mpc8536ds.c (e1ccf97c5d7651664d37c0c5aa243874b8851b2d) mpc8536ds.c (063c12633d5ad74d52152d9c358e715475e17629)
1/*
2 * Copyright 2008-2010 Freescale Semiconductor, Inc.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as

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31#include <asm/fsl_ddr_sdram.h>
32#include <asm/io.h>
33#include <asm/fsl_serdes.h>
34#include <spd.h>
35#include <miiphy.h>
36#include <libfdt.h>
37#include <spd_sdram.h>
38#include <fdt_support.h>
1/*
2 * Copyright 2008-2010 Freescale Semiconductor, Inc.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as

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31#include <asm/fsl_ddr_sdram.h>
32#include <asm/io.h>
33#include <asm/fsl_serdes.h>
34#include <spd.h>
35#include <miiphy.h>
36#include <libfdt.h>
37#include <spd_sdram.h>
38#include <fdt_support.h>
39#include <fsl_mdio.h>
39#include <tsec.h>
40#include <netdev.h>
41#include <sata.h>
42
43#include "../common/sgmii_riser.h"
44
45int board_early_init_f (void)
46{

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229 0, flash_esel, BOOKE_PAGESZ_256M, 1); /* ts, esel, tsize, iprot */
230
231 return 0;
232}
233
234int board_eth_init(bd_t *bis)
235{
236#ifdef CONFIG_TSEC_ENET
40#include <tsec.h>
41#include <netdev.h>
42#include <sata.h>
43
44#include "../common/sgmii_riser.h"
45
46int board_early_init_f (void)
47{

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230 0, flash_esel, BOOKE_PAGESZ_256M, 1); /* ts, esel, tsize, iprot */
231
232 return 0;
233}
234
235int board_eth_init(bd_t *bis)
236{
237#ifdef CONFIG_TSEC_ENET
238 struct fsl_pq_mdio_info mdio_info;
237 struct tsec_info_struct tsec_info[2];
238 int num = 0;
239
240#ifdef CONFIG_TSEC1
241 SET_STD_TSEC_INFO(tsec_info[num], 1);
242 if (is_serdes_configured(SGMII_TSEC1)) {
243 puts("eTSEC1 is in sgmii mode.\n");
244 tsec_info[num].phyaddr = 0;

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263
264#ifdef CONFIG_FSL_SGMII_RISER
265 if (is_serdes_configured(SGMII_TSEC1) ||
266 is_serdes_configured(SGMII_TSEC3)) {
267 fsl_sgmii_riser_init(tsec_info, num);
268 }
269#endif
270
239 struct tsec_info_struct tsec_info[2];
240 int num = 0;
241
242#ifdef CONFIG_TSEC1
243 SET_STD_TSEC_INFO(tsec_info[num], 1);
244 if (is_serdes_configured(SGMII_TSEC1)) {
245 puts("eTSEC1 is in sgmii mode.\n");
246 tsec_info[num].phyaddr = 0;

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265
266#ifdef CONFIG_FSL_SGMII_RISER
267 if (is_serdes_configured(SGMII_TSEC1) ||
268 is_serdes_configured(SGMII_TSEC3)) {
269 fsl_sgmii_riser_init(tsec_info, num);
270 }
271#endif
272
273 mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
274 mdio_info.name = DEFAULT_MII_NAME;
275 fsl_pq_mdio_init(bis, &mdio_info);
276
271 tsec_eth_init(bis, tsec_info, num);
272#endif
273 return pci_eth_init(bis);
274}
275
276#if defined(CONFIG_OF_BOARD_SETUP)
277void ft_board_setup(void *blob, bd_t *bd)
278{
279 ft_cpu_setup(blob, bd);
280
281 FT_FSL_PCI_SETUP;
282
283#ifdef CONFIG_FSL_SGMII_RISER
284 fsl_sgmii_riser_fdt_fixup(blob);
285#endif
286}
287#endif
277 tsec_eth_init(bis, tsec_info, num);
278#endif
279 return pci_eth_init(bis);
280}
281
282#if defined(CONFIG_OF_BOARD_SETUP)
283void ft_board_setup(void *blob, bd_t *bd)
284{
285 ft_cpu_setup(blob, bd);
286
287 FT_FSL_PCI_SETUP;
288
289#ifdef CONFIG_FSL_SGMII_RISER
290 fsl_sgmii_riser_fdt_fixup(blob);
291#endif
292}
293#endif