mpc837xerdb.c (cb5473205206c7f14cbb1e747f28ec75b48826e2) mpc837xerdb.c (9adda5459ca62120c0c50b82b766fe1cf6925bbf)
1/*
2 * Copyright (C) 2007 Freescale Semiconductor, Inc.
3 * Kevin Lam <kevin.lam@freescale.com>
4 * Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *

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54 }
55 }
56
57 printf("DRAM test passed.\n");
58 return 0;
59}
60#endif
61
1/*
2 * Copyright (C) 2007 Freescale Semiconductor, Inc.
3 * Kevin Lam <kevin.lam@freescale.com>
4 * Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *

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54 }
55 }
56
57 printf("DRAM test passed.\n");
58 return 0;
59}
60#endif
61
62#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
62#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
63void ddr_enable_ecc(unsigned int dram_size);
64#endif
65int fixed_sdram(void);
66
67phys_size_t initdram(int board_type)
68{
69 immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
70 u32 msize = 0;
71
72 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
73 return -1;
74
75#if defined(CONFIG_SPD_EEPROM)
76 msize = spd_sdram();
77#else
78 msize = fixed_sdram();
79#endif
80
63void ddr_enable_ecc(unsigned int dram_size);
64#endif
65int fixed_sdram(void);
66
67phys_size_t initdram(int board_type)
68{
69 immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
70 u32 msize = 0;
71
72 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
73 return -1;
74
75#if defined(CONFIG_SPD_EEPROM)
76 msize = spd_sdram();
77#else
78 msize = fixed_sdram();
79#endif
80
81#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
81#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
82 /* Initialize DDR ECC byte */
83 ddr_enable_ecc(msize * 1024 * 1024);
84#endif
85 /* return total bus DDR size(bytes) */
86 return (msize * 1024 * 1024);
87}
88
89#if !defined(CONFIG_SPD_EEPROM)

--- 110 unchanged lines hidden --- 		82 /* Initialize DDR ECC byte */
83 ddr_enable_ecc(msize * 1024 * 1024);
84#endif
85 /* return total bus DDR size(bytes) */
86 return (msize * 1024 * 1024);
87}
88
89#if !defined(CONFIG_SPD_EEPROM)

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