| mpc837xemds.c (e1ac387f4645499746856adc1aeaa9787da2eca6) | mpc837xemds.c (9adda5459ca62120c0c50b82b766fe1cf6925bbf) |
|---|---|
| 1/* 2 * Copyright (C) 2007 Freescale Semiconductor, Inc. 3 * Dave Liu <daveliu@freescale.com> 4 * 5 * CREDITS: Kim Phillips contribute to LIBFDT code 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as --- 185 unchanged lines hidden (view full) --- 194int board_early_init_r(void) 195{ 196#ifdef CONFIG_PQ_MDS_PIB 197 pib_init(); 198#endif 199 return 0; 200} 201 | 1/* 2 * Copyright (C) 2007 Freescale Semiconductor, Inc. 3 * Dave Liu <daveliu@freescale.com> 4 * 5 * CREDITS: Kim Phillips contribute to LIBFDT code 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as --- 185 unchanged lines hidden (view full) --- 194int board_early_init_r(void) 195{ 196#ifdef CONFIG_PQ_MDS_PIB 197 pib_init(); 198#endif 199 return 0; 200} 201 |
| 202#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC) | 202#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) |
| 203extern void ddr_enable_ecc(unsigned int dram_size); 204#endif 205int fixed_sdram(void); 206 207phys_size_t initdram(int board_type) 208{ 209 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; 210 u32 msize = 0; 211 212 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) 213 return -1; 214 215#if defined(CONFIG_SPD_EEPROM) 216 msize = spd_sdram(); 217#else 218 msize = fixed_sdram(); 219#endif 220 | 203extern void ddr_enable_ecc(unsigned int dram_size); 204#endif 205int fixed_sdram(void); 206 207phys_size_t initdram(int board_type) 208{ 209 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; 210 u32 msize = 0; 211 212 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) 213 return -1; 214 215#if defined(CONFIG_SPD_EEPROM) 216 msize = spd_sdram(); 217#else 218 msize = fixed_sdram(); 219#endif 220 |
| 221#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC) | 221#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) |
| 222 /* Initialize DDR ECC byte */ 223 ddr_enable_ecc(msize * 1024 * 1024); 224#endif 225 226 /* return total bus DDR size(bytes) */ 227 return (msize * 1024 * 1024); 228} 229 --- 103 unchanged lines hidden --- | 222 /* Initialize DDR ECC byte */ 223 ddr_enable_ecc(msize * 1024 * 1024); 224#endif 225 226 /* return total bus DDR size(bytes) */ 227 return (msize * 1024 * 1024); 228} 229 --- 103 unchanged lines hidden --- |