m54451evb.c (f78ced3028d4130b24a318943a70cf5584ab16f4) | m54451evb.c (6d0f6bcf337c5261c08fabe12982178c2c489d76) |
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1/* 2 * (C) Copyright 2000-2003 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. 6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 7 * 8 * See file CREDITS for list of people who contributed to this --- 35 unchanged lines hidden (view full) --- 44phys_size_t initdram(int board_type) 45{ 46 u32 dramsize; 47#ifdef CONFIG_CF_SBF 48 /* 49 * Serial Boot: The dram is already initialized in start.S 50 * only require to return DRAM size 51 */ | 1/* 2 * (C) Copyright 2000-2003 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. 6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 7 * 8 * See file CREDITS for list of people who contributed to this --- 35 unchanged lines hidden (view full) --- 44phys_size_t initdram(int board_type) 45{ 46 u32 dramsize; 47#ifdef CONFIG_CF_SBF 48 /* 49 * Serial Boot: The dram is already initialized in start.S 50 * only require to return DRAM size 51 */ |
52 dramsize = CFG_SDRAM_SIZE * 0x100000; | 52 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; |
53#else 54 volatile sdramc_t *sdram = (volatile sdramc_t *)(MMAP_SDRAM); 55 volatile gpio_t *gpio = (volatile gpio_t *)(MMAP_GPIO); 56 u32 i; 57 | 53#else 54 volatile sdramc_t *sdram = (volatile sdramc_t *)(MMAP_SDRAM); 55 volatile gpio_t *gpio = (volatile gpio_t *)(MMAP_GPIO); 56 u32 i; 57 |
58 dramsize = CFG_SDRAM_SIZE * 0x100000; | 58 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; |
59 | 59 |
60 if ((sdram->sdcfg1 == CFG_SDRAM_CFG1) && 61 (sdram->sdcfg2 == CFG_SDRAM_CFG2)) | 60 if ((sdram->sdcfg1 == CONFIG_SYS_SDRAM_CFG1) && 61 (sdram->sdcfg2 == CONFIG_SYS_SDRAM_CFG2)) |
62 return dramsize; 63 64 for (i = 0x13; i < 0x20; i++) { 65 if (dramsize == (1 << i)) 66 break; 67 } 68 i--; 69 | 62 return dramsize; 63 64 for (i = 0x13; i < 0x20; i++) { 65 if (dramsize == (1 << i)) 66 break; 67 } 68 i--; 69 |
70 gpio->mscr_sdram = CFG_SDRAM_DRV_STRENGTH; | 70 gpio->mscr_sdram = CONFIG_SYS_SDRAM_DRV_STRENGTH; |
71 | 71 |
72 sdram->sdcs0 = (CFG_SDRAM_BASE | i); | 72 sdram->sdcs0 = (CONFIG_SYS_SDRAM_BASE | i); |
73 | 73 |
74 sdram->sdcfg1 = CFG_SDRAM_CFG1; 75 sdram->sdcfg2 = CFG_SDRAM_CFG2; | 74 sdram->sdcfg1 = CONFIG_SYS_SDRAM_CFG1; 75 sdram->sdcfg2 = CONFIG_SYS_SDRAM_CFG2; |
76 77 udelay(200); 78 79 /* Issue PALL */ | 76 77 udelay(200); 78 79 /* Issue PALL */ |
80 sdram->sdcr = CFG_SDRAM_CTRL | 2; | 80 sdram->sdcr = CONFIG_SYS_SDRAM_CTRL | 2; |
81 __asm__("nop"); 82 83 /* Perform two refresh cycles */ | 81 __asm__("nop"); 82 83 /* Perform two refresh cycles */ |
84 sdram->sdcr = CFG_SDRAM_CTRL | 4; | 84 sdram->sdcr = CONFIG_SYS_SDRAM_CTRL | 4; |
85 __asm__("nop"); | 85 __asm__("nop"); |
86 sdram->sdcr = CFG_SDRAM_CTRL | 4; | 86 sdram->sdcr = CONFIG_SYS_SDRAM_CTRL | 4; |
87 __asm__("nop"); 88 89 /* Issue LEMR */ | 87 __asm__("nop"); 88 89 /* Issue LEMR */ |
90 sdram->sdmr = CFG_SDRAM_MODE; | 90 sdram->sdmr = CONFIG_SYS_SDRAM_MODE; |
91 __asm__("nop"); | 91 __asm__("nop"); |
92 sdram->sdmr = CFG_SDRAM_EMOD; | 92 sdram->sdmr = CONFIG_SYS_SDRAM_EMOD; |
93 __asm__("nop"); 94 | 93 __asm__("nop"); 94 |
95 sdram->sdcr = (CFG_SDRAM_CTRL & ~0x80000000) | 0x10000000; | 95 sdram->sdcr = (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000000; |
96 97 udelay(100); 98#endif 99 return (dramsize); 100}; 101 102int testdram(void) 103{ 104 /* TODO: XXX XXX XXX */ 105 printf("DRAM test not implemented!\n"); 106 107 return (0); 108} | 96 97 udelay(100); 98#endif 99 return (dramsize); 100}; 101 102int testdram(void) 103{ 104 /* TODO: XXX XXX XXX */ 105 printf("DRAM test not implemented!\n"); 106 107 return (0); 108} |