| da850evm.c (cdc51c294ad33879c4e57edf4c9d2155381b1d59) | da850evm.c (24a514c44557601de52df3c8bc0ee789bef8714c) |
|---|---|
| 1/* 2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * Based on da830evm.c. Original Copyrights follow: 5 * 6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 8 * --- 165 unchanged lines hidden (view full) --- 174 175 176#ifdef CONFIG_NAND_DAVINCI 177 /* 178 * NAND CS setup - cycle counts based on da850evm NAND timings in the 179 * Linux kernel @ 25MHz EMIFA 180 */ 181 writel((DAVINCI_ABCR_WSETUP(0) | | 1/* 2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * Based on da830evm.c. Original Copyrights follow: 5 * 6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 8 * --- 165 unchanged lines hidden (view full) --- 174 175 176#ifdef CONFIG_NAND_DAVINCI 177 /* 178 * NAND CS setup - cycle counts based on da850evm NAND timings in the 179 * Linux kernel @ 25MHz EMIFA 180 */ 181 writel((DAVINCI_ABCR_WSETUP(0) | |
| 182 DAVINCI_ABCR_WSTROBE(0) | | 182 DAVINCI_ABCR_WSTROBE(1) | |
| 183 DAVINCI_ABCR_WHOLD(0) | 184 DAVINCI_ABCR_RSETUP(0) | 185 DAVINCI_ABCR_RSTROBE(1) | 186 DAVINCI_ABCR_RHOLD(0) | | 183 DAVINCI_ABCR_WHOLD(0) | 184 DAVINCI_ABCR_RSETUP(0) | 185 DAVINCI_ABCR_RSTROBE(1) | 186 DAVINCI_ABCR_RHOLD(0) | |
| 187 DAVINCI_ABCR_TA(0) | | 187 DAVINCI_ABCR_TA(1) | |
| 188 DAVINCI_ABCR_ASIZE_8BIT), 189 &davinci_emif_regs->ab2cr); /* CS3 */ 190#endif 191 192 /* arch number of the board */ 193 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; 194 195 /* address of boot parameters */ --- 141 unchanged lines hidden --- | 188 DAVINCI_ABCR_ASIZE_8BIT), 189 &davinci_emif_regs->ab2cr); /* CS3 */ 190#endif 191 192 /* arch number of the board */ 193 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; 194 195 /* address of boot parameters */ --- 141 unchanged lines hidden --- |