da850evm.c (1506b0a83713f4d537d44bebd8616226fec55279) da850evm.c (cf2c24e3996e49a26b449ab7daf843856b35b5c8)
1/*
2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * Based on da830evm.c. Original Copyrights follow:
5 *
6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
8 *

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25#include <i2c.h>
26#include <net.h>
27#include <netdev.h>
28#include <asm/arch/hardware.h>
29#include <asm/arch/emif_defs.h>
30#include <asm/arch/emac_defs.h>
31#include <asm/io.h>
32#include <asm/arch/davinci_misc.h>
1/*
2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * Based on da830evm.c. Original Copyrights follow:
5 *
6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
8 *

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25#include <i2c.h>
26#include <net.h>
27#include <netdev.h>
28#include <asm/arch/hardware.h>
29#include <asm/arch/emif_defs.h>
30#include <asm/arch/emac_defs.h>
31#include <asm/io.h>
32#include <asm/arch/davinci_misc.h>
33#include <hwconfig.h>
33
34DECLARE_GLOBAL_DATA_PTR;
35
36#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
37
38/* SPI0 pin muxer settings */
39static const struct pinmux_config spi1_pins[] = {
40 { pinmux(5), 1, 1 },

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158
159#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
160#define HAS_RMII 1
161#else
162#define HAS_RMII 0
163#endif
164#endif /* CONFIG_DRIVER_TI_EMAC */
165
34
35DECLARE_GLOBAL_DATA_PTR;
36
37#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
38
39/* SPI0 pin muxer settings */
40static const struct pinmux_config spi1_pins[] = {
41 { pinmux(5), 1, 1 },

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159
160#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
161#define HAS_RMII 1
162#else
163#define HAS_RMII 0
164#endif
165#endif /* CONFIG_DRIVER_TI_EMAC */
166
167void dsp_lpsc_on(unsigned domain, unsigned int id)
168{
169 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
170 struct davinci_psc_regs *psc_regs;
171
172 psc_regs = davinci_psc0_regs;
173 mdstat = &psc_regs->psc0.mdstat[id];
174 mdctl = &psc_regs->psc0.mdctl[id];
175 ptstat = &psc_regs->ptstat;
176 ptcmd = &psc_regs->ptcmd;
177
178 while (*ptstat & (0x1 << domain))
179 ;
180
181 if ((*mdstat & 0x1f) == 0x03)
182 return; /* Already on and enabled */
183
184 *mdctl |= 0x03;
185
186 *ptcmd = 0x1 << domain;
187
188 while (*ptstat & (0x1 << domain))
189 ;
190 while ((*mdstat & 0x1f) != 0x03)
191 ; /* Probably an overkill... */
192}
193
194static void dspwake(void)
195{
196 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
197 u32 val;
198
199 /* if the device is ARM only, return */
200 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
201 return;
202
203 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
204 return;
205
206 *resetvect++ = 0x1E000; /* DSP Idle */
207 /* clear out the next 10 words as NOP */
208 memset(resetvect, 0, sizeof(unsigned) *10);
209
210 /* setup the DSP reset vector */
211 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
212
213 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
214 val = readl(PSC0_MDCTL + (15 * 4));
215 val |= 0x100;
216 writel(val, (PSC0_MDCTL + (15 * 4)));
217}
218
219int misc_init_r(void)
220{
221 dspwake();
222 return 0;
223}
224
166static const struct pinmux_resource pinmuxes[] = {
167#ifdef CONFIG_SPI_FLASH
168 PINMUX_ITEM(spi1_pins),
169#endif
170 PINMUX_ITEM(uart_pins),
171 PINMUX_ITEM(i2c_pins),
172#ifdef CONFIG_NAND_DAVINCI
173 PINMUX_ITEM(nand_pins),

--- 214 unchanged lines hidden --- 		225static const struct pinmux_resource pinmuxes[] = {
226#ifdef CONFIG_SPI_FLASH
227 PINMUX_ITEM(spi1_pins),
228#endif
229 PINMUX_ITEM(uart_pins),
230 PINMUX_ITEM(i2c_pins),
231#ifdef CONFIG_NAND_DAVINCI
232 PINMUX_ITEM(nand_pins),

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