flash.c (1cfefe8cb6e1bb43f6509c0aee254e2908d42f21) flash.c (6d0f6bcf337c5261c08fabe12982178c2c489d76)
1/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or

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18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
1/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or

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18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
26#define PHYS_FLASH_1 CFG_FLASH_BASE
26#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
27#define FLASH_BANK_SIZE 0x200000
28
27#define FLASH_BANK_SIZE 0x200000
28
29flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
29flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
30
31void flash_print_info (flash_info_t * info)
32{
33 int i;
34
35 switch (info->flash_id & FLASH_VENDMASK) {
36 case (AMD_MANUFACT & FLASH_VENDMASK):
37 printf ("AMD: ");

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69}
70
71
72unsigned long flash_init (void)
73{
74 int i, j;
75 ulong size = 0;
76
30
31void flash_print_info (flash_info_t * info)
32{
33 int i;
34
35 switch (info->flash_id & FLASH_VENDMASK) {
36 case (AMD_MANUFACT & FLASH_VENDMASK):
37 printf ("AMD: ");

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69}
70
71
72unsigned long flash_init (void)
73{
74 int i, j;
75 ulong size = 0;
76
77 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
77 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
78 ulong flashbase = 0;
79
80 flash_info[i].flash_id =
81 (AMD_MANUFACT & FLASH_VENDMASK) |
82 (AMD_ID_PL160CB & FLASH_TYPEMASK);
83 flash_info[i].size = FLASH_BANK_SIZE;
78 ulong flashbase = 0;
79
80 flash_info[i].flash_id =
81 (AMD_MANUFACT & FLASH_VENDMASK) |
82 (AMD_ID_PL160CB & FLASH_TYPEMASK);
83 flash_info[i].size = FLASH_BANK_SIZE;
84 flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
85 memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
84 flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
85 memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
86 if (i == 0)
87 flashbase = PHYS_FLASH_1;
88 else
89 panic ("configured to many flash banks!\n");
90
91 for (j = 0; j < flash_info[i].sector_count; j++) {
92 if (j == 0) {
93 /* 1st is 16 KiB */

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108 flashbase + 0x40000 + 0x40000 * (j -
109 4);
110 }
111 }
112 size += flash_info[i].size;
113 }
114
115 flash_protect (FLAG_PROTECT_SET,
86 if (i == 0)
87 flashbase = PHYS_FLASH_1;
88 else
89 panic ("configured to many flash banks!\n");
90
91 for (j = 0; j < flash_info[i].sector_count; j++) {
92 if (j == 0) {
93 /* 1st is 16 KiB */

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108 flashbase + 0x40000 + 0x40000 * (j -
109 4);
110 }
111 }
112 size += flash_info[i].size;
113 }
114
115 flash_protect (FLAG_PROTECT_SET,
116 CFG_FLASH_BASE,
117 CFG_FLASH_BASE + 0x3ffff, &flash_info[0]);
116 CONFIG_SYS_FLASH_BASE,
117 CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
118
119 return size;
120}
121
122
123#define CMD_READ_ARRAY 0x00F0
124#define CMD_UNLOCK1 0x00AA
125#define CMD_UNLOCK2 0x0055
126#define CMD_ERASE_SETUP 0x0080
127#define CMD_ERASE_CONFIRM 0x0030
128#define CMD_PROGRAM 0x00A0
129#define CMD_UNLOCK_BYPASS 0x0020
130
118
119 return size;
120}
121
122
123#define CMD_READ_ARRAY 0x00F0
124#define CMD_UNLOCK1 0x00AA
125#define CMD_UNLOCK2 0x0055
126#define CMD_ERASE_SETUP 0x0080
127#define CMD_ERASE_CONFIRM 0x0030
128#define CMD_PROGRAM 0x00A0
129#define CMD_UNLOCK_BYPASS 0x0020
130
131#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555<<1)))
132#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA<<1)))
131#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
132#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
133
134#define BIT_ERASE_DONE 0x0080
135#define BIT_RDY_MASK 0x0080
136#define BIT_PROGRAM_ERROR 0x0020
137#define BIT_TIMEOUT 0x80000000 /* our flag */
138
139#define READY 1
140#define ERR 2

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206
207 /* wait until flash is ready */
208 chip1 = 0;
209
210 do {
211 result = *addr;
212
213 /* check timeout */
133
134#define BIT_ERASE_DONE 0x0080
135#define BIT_RDY_MASK 0x0080
136#define BIT_PROGRAM_ERROR 0x0020
137#define BIT_TIMEOUT 0x80000000 /* our flag */
138
139#define READY 1
140#define ERR 2

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206
207 /* wait until flash is ready */
208 chip1 = 0;
209
210 do {
211 result = *addr;
212
213 /* check timeout */
214 if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
214 if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) {
215 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
216 chip1 = TMO;
217 break;
218 }
219
220 if (!chip1
221 && (result & 0xFFFF) & BIT_ERASE_DONE)
222 chip1 = READY;

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294 set_timer (0);
295
296 /* wait until flash is ready */
297 chip1 = 0;
298 do {
299 result = *addr;
300
301 /* check timeout */
215 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
216 chip1 = TMO;
217 break;
218 }
219
220 if (!chip1
221 && (result & 0xFFFF) & BIT_ERASE_DONE)
222 chip1 = READY;

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294 set_timer (0);
295
296 /* wait until flash is ready */
297 chip1 = 0;
298 do {
299 result = *addr;
300
301 /* check timeout */
302 if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
302 if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) {
303 chip1 = ERR | TMO;
304 break;
305 }
306 if (!chip1 && ((result & 0x80) == (data & 0x80)))
307 chip1 = READY;
308
309 } while (!chip1);
310

--- 68 unchanged lines hidden --- 		303 chip1 = ERR | TMO;
304 break;
305 }
306 if (!chip1 && ((result & 0x80) == (data & 0x80)))
307 chip1 = READY;
308
309 } while (!chip1);
310

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