mcf5373l.c (52c411805c090999f015df8bdf8016fb684746d0) | mcf5373l.c (088454cde245b4d431ce0181be8b3cbceea059d6) |
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1/* 2 * (C) Copyright 2000-2003 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * modified by Wolfgang Wegner <w.wegner@astro-kom.de> for ASTRO 5373l 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 --- 13 unchanged lines hidden (view full) --- 22 23int checkboard(void) 24{ 25 puts("Board: "); 26 puts("ASTRO MCF5373L (Urmel) Board\n"); 27 return 0; 28} 29 | 1/* 2 * (C) Copyright 2000-2003 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * modified by Wolfgang Wegner <w.wegner@astro-kom.de> for ASTRO 5373l 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 --- 13 unchanged lines hidden (view full) --- 22 23int checkboard(void) 24{ 25 puts("Board: "); 26 puts("ASTRO MCF5373L (Urmel) Board\n"); 27 return 0; 28} 29 |
30phys_size_t initdram(void) | 30int initdram(void) |
31{ 32#if !defined(CONFIG_MONITOR_IS_IN_RAM) 33 sdram_t *sdp = (sdram_t *)(MMAP_SDRAM); 34 35 /* 36 * GPIO configuration for bus should be set correctly from reset, 37 * so we do not care! First, set up address space: at this point, 38 * we should be running from internal SRAM; --- 35 unchanged lines hidden (view full) --- 74 75 /* 76 * for get_ram_size() to work, both CS areas have to be 77 * configured, i.e. CS1 has to be explicitely disabled, else 78 * probing for memory will cause the SDRAM bus to hang! 79 * (Do not rely on the SDCS register(s) being set to 0x00000000 80 * during reset as stated in the data sheet.) 81 */ | 31{ 32#if !defined(CONFIG_MONITOR_IS_IN_RAM) 33 sdram_t *sdp = (sdram_t *)(MMAP_SDRAM); 34 35 /* 36 * GPIO configuration for bus should be set correctly from reset, 37 * so we do not care! First, set up address space: at this point, 38 * we should be running from internal SRAM; --- 35 unchanged lines hidden (view full) --- 74 75 /* 76 * for get_ram_size() to work, both CS areas have to be 77 * configured, i.e. CS1 has to be explicitely disabled, else 78 * probing for memory will cause the SDRAM bus to hang! 79 * (Do not rely on the SDCS register(s) being set to 0x00000000 80 * during reset as stated in the data sheet.) 81 */ |
82 return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, | 82 gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, |
83 0x80000000 - CONFIG_SYS_SDRAM_BASE); | 83 0x80000000 - CONFIG_SYS_SDRAM_BASE); |
84 85 return 0; |
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84} 85 86#define UART_BASE MMAP_UART0 87int rs_serial_init(int port, int baud) 88{ 89 uart_t *uart; 90 u32 counter; 91 --- 104 unchanged lines hidden --- | 86} 87 88#define UART_BASE MMAP_UART0 89int rs_serial_init(int port, int baud) 90{ 91 uart_t *uart; 92 u32 counter; 93 --- 104 unchanged lines hidden --- |