openrd.c (3dc23f7852158fafde9eb736060f9e8131997f19) openrd.c (d5c5132f878394b7487d3f6da0d469aa72737318)
1/*
2 * (C) Copyright 2009
3 * Net Insight <www.netinsight.net>
4 * Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
5 *
6 * Based on sheevaplug.c:
7 * (C) Copyright 2009
8 * Marvell Semiconductor <www.marvell.com>

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22
23int board_early_init_f(void)
24{
25 /*
26 * default gpio configuration
27 * There are maximum 64 gpios controlled through 2 sets of registers
28 * the below configuration configures mainly initial LED status
29 */
1/*
2 * (C) Copyright 2009
3 * Net Insight <www.netinsight.net>
4 * Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
5 *
6 * Based on sheevaplug.c:
7 * (C) Copyright 2009
8 * Marvell Semiconductor <www.marvell.com>

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22
23int board_early_init_f(void)
24{
25 /*
26 * default gpio configuration
27 * There are maximum 64 gpios controlled through 2 sets of registers
28 * the below configuration configures mainly initial LED status
29 */
30 kw_config_gpio(OPENRD_OE_VAL_LOW,
31 OPENRD_OE_VAL_HIGH,
32 OPENRD_OE_LOW, OPENRD_OE_HIGH);
30 mvebu_config_gpio(OPENRD_OE_VAL_LOW,
31 OPENRD_OE_VAL_HIGH,
32 OPENRD_OE_LOW, OPENRD_OE_HIGH);
33
34 /* Multi-Purpose Pins Functionality configuration */
35 static const u32 kwmpp_config[] = {
36 MPP0_NF_IO2,
37 MPP1_NF_IO3,
38 MPP2_NF_IO4,
39 MPP3_NF_IO5,
40 MPP4_NF_IO6,

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34 /* Multi-Purpose Pins Functionality configuration */
35 static const u32 kwmpp_config[] = {
36 MPP0_NF_IO2,
37 MPP1_NF_IO3,
38 MPP2_NF_IO4,
39 MPP3_NF_IO5,
40 MPP4_NF_IO6,

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