dreamplug.c (3dc23f7852158fafde9eb736060f9e8131997f19) dreamplug.c (d5c5132f878394b7487d3f6da0d469aa72737318)
1/*
2 * (C) Copyright 2011
3 * Jason Cooper <u-boot@lakedaemon.net>
4 *
5 * Based on work by:
6 * Marvell Semiconductor <www.marvell.com>
7 * Written-by: Siddarth Gore <gores@marvell.com>
8 *

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20
21int board_early_init_f(void)
22{
23 /*
24 * default gpio configuration
25 * There are maximum 64 gpios controlled through 2 sets of registers
26 * the below configuration configures mainly initial LED status
27 */
1/*
2 * (C) Copyright 2011
3 * Jason Cooper <u-boot@lakedaemon.net>
4 *
5 * Based on work by:
6 * Marvell Semiconductor <www.marvell.com>
7 * Written-by: Siddarth Gore <gores@marvell.com>
8 *

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20
21int board_early_init_f(void)
22{
23 /*
24 * default gpio configuration
25 * There are maximum 64 gpios controlled through 2 sets of registers
26 * the below configuration configures mainly initial LED status
27 */
28 kw_config_gpio(DREAMPLUG_OE_VAL_LOW,
29 DREAMPLUG_OE_VAL_HIGH,
30 DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH);
28 mvebu_config_gpio(DREAMPLUG_OE_VAL_LOW,
29 DREAMPLUG_OE_VAL_HIGH,
30 DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH);
31
32 /* Multi-Purpose Pins Functionality configuration */
33 static const u32 kwmpp_config[] = {
34 MPP0_SPI_SCn, /* SPI Flash */
35 MPP1_SPI_MOSI,
36 MPP2_SPI_SCK,
37 MPP3_SPI_MISO,
38 MPP4_NF_IO6,

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32 /* Multi-Purpose Pins Functionality configuration */
33 static const u32 kwmpp_config[] = {
34 MPP0_SPI_SCn, /* SPI Flash */
35 MPP1_SPI_MOSI,
36 MPP2_SPI_SCK,
37 MPP3_SPI_MISO,
38 MPP4_NF_IO6,

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