board.c (2e8560797fc69a34c330a875da4f5d2992452f1e) board.c (eaba7df7041ebdd6cff3702d87d6bdb6870ec5e3)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * board.c
4 *
5 * Board functions for B&R BRXRE1 Board
6 *
7 * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
8 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com

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17#include <asm/arch/ddr_defs.h>
18#include <asm/arch/clock.h>
19#include <asm/arch/gpio.h>
20#include <asm/arch/sys_proto.h>
21#include <asm/arch/mem.h>
22#include <asm/io.h>
23#include <asm/emif.h>
24#include <asm/gpio.h>
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * board.c
4 *
5 * Board functions for B&R BRXRE1 Board
6 *
7 * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
8 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com

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17#include <asm/arch/ddr_defs.h>
18#include <asm/arch/clock.h>
19#include <asm/arch/gpio.h>
20#include <asm/arch/sys_proto.h>
21#include <asm/arch/mem.h>
22#include <asm/io.h>
23#include <asm/emif.h>
24#include <asm/gpio.h>
25#include <dm.h>
25#include <i2c.h>
26#include <power/tps65217.h>
27#include "../common/bur_common.h"
28#include <lcd.h>
29
30/* -------------------------------------------------------------------------*/
31/* -- defines for used GPIO Hardware -- */
32#define ESC_KEY (0+19)

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43#define RSTCTRL_SCRATCHREG 0x04
44
45/* -- defines for RSTCTRL_CTRLREG -- */
46#define RSTCTRL_FORCE_PWR_NEN 0x0404
47#define RSTCTRL_CAN_STB 0x4040
48
49DECLARE_GLOBAL_DATA_PTR;
50
26#include <i2c.h>
27#include <power/tps65217.h>
28#include "../common/bur_common.h"
29#include <lcd.h>
30
31/* -------------------------------------------------------------------------*/
32/* -- defines for used GPIO Hardware -- */
33#define ESC_KEY (0+19)

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44#define RSTCTRL_SCRATCHREG 0x04
45
46/* -- defines for RSTCTRL_CTRLREG -- */
47#define RSTCTRL_FORCE_PWR_NEN 0x0404
48#define RSTCTRL_CAN_STB 0x4040
49
50DECLARE_GLOBAL_DATA_PTR;
51
52static int rstctrl_rw(u8 reg, unsigned char rnw, void *pdat, int size)
53{
54 struct udevice *i2cdev;
55 int rc;
56
57 rc = i2c_get_chip_for_busnum(0, RSTCTRL_ADDR, 1, &i2cdev);
58 if (rc >= 0) {
59 if (rnw)
60 rc = dm_i2c_read(i2cdev, reg, pdat, size);
61 else
62 rc = dm_i2c_write(i2cdev, reg, pdat, size);
63 } else {
64 printf("%s: cannot get udevice for chip 0x%02x!\n",
65 __func__, RSTCTRL_ADDR);
66 }
67
68 return rc;
69}
70
51#if defined(CONFIG_SPL_BUILD)
52/* TODO: check ram-timing ! */
53static const struct ddr_data ddr3_data = {
54 .datardsratio0 = MT41K256M16HA125E_RD_DQS,
55 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
56 .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
57 .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
58};

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84 .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
85};
86
87#define OSC (V_OSCK/1000000)
88const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
89
90void am33xx_spl_board_init(void)
91{
71#if defined(CONFIG_SPL_BUILD)
72/* TODO: check ram-timing ! */
73static const struct ddr_data ddr3_data = {
74 .datardsratio0 = MT41K256M16HA125E_RD_DQS,
75 .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
76 .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
77 .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
78};

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104 .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
105};
106
107#define OSC (V_OSCK/1000000)
108const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
109
110void am33xx_spl_board_init(void)
111{
92 unsigned int oldspeed;
93 unsigned short buf;
112 unsigned short buf;
113 int rc;
94
95 struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
96 struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;
97 /*
98 * enable additional clocks of modules which are accessed later from
99 * VxWorks OS
100 */
101 u32 *const clk_domains[] = { 0 };

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109 &cmper->epwmss1clkctrl,
110 &cmper->epwmss2clkctrl,
111 &cmper->lcdclkctrl,
112 &cmper->lcdcclkstctrl,
113 0
114 };
115 do_enable_clocks(clk_domains, clk_modules_xre1specific, 1);
116 /* power-OFF LCD-Display */
114
115 struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
116 struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;
117 /*
118 * enable additional clocks of modules which are accessed later from
119 * VxWorks OS
120 */
121 u32 *const clk_domains[] = { 0 };

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129 &cmper->epwmss1clkctrl,
130 &cmper->epwmss2clkctrl,
131 &cmper->lcdclkctrl,
132 &cmper->lcdcclkstctrl,
133 0
134 };
135 do_enable_clocks(clk_domains, clk_modules_xre1specific, 1);
136 /* power-OFF LCD-Display */
117 gpio_direction_output(LCD_PWR, 0);
137 if (gpio_request(LCD_PWR, "LCD_PWR") != 0)
138 printf("cannot request gpio for LCD_PWR!\n");
139 else if (gpio_direction_output(LCD_PWR, 0) != 0)
140 printf("cannot set direction output on LCD_PWR!\n");
118
119 /* setup I2C */
120 enable_i2c_pin_mux();
141
142 /* setup I2C */
143 enable_i2c_pin_mux();
121 i2c_set_bus_num(0);
122 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
123
144
124 /* power-ON 3V3 via Resetcontroller */
125 oldspeed = i2c_get_bus_speed();
126 if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
127 buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB;
128 i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1,
129 (uint8_t *)&buf, sizeof(buf));
130 i2c_set_bus_speed(oldspeed);
131 } else {
132 puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n");
133 }
145 /* power-ON 3V3 via Resetcontroller */
146 buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB;
147 rc = rstctrl_rw(RSTCTRL_CTRLREG, 0, (uint8_t *)&buf, sizeof(buf));
148 if (rc != 0)
149 printf("ERROR: cannot write to resetc (turn on PWR_nEN)\n");
134
135 pmicsetup(0, 0);
136}
137
138const struct dpll_params *get_dpll_ddr_params(void)
139{
140 return &dpll_ddr3;
141}

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148 &ddr3_emif_reg_data, 0);
149}
150#endif /* CONFIG_SPL_BUILD */
151/*
152 * Basic board specific setup. Pinmux has been handled already.
153 */
154int board_init(void)
155{
150
151 pmicsetup(0, 0);
152}
153
154const struct dpll_params *get_dpll_ddr_params(void)
155{
156 return &dpll_ddr3;
157}

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164 &ddr3_emif_reg_data, 0);
165}
166#endif /* CONFIG_SPL_BUILD */
167/*
168 * Basic board specific setup. Pinmux has been handled already.
169 */
170int board_init(void)
171{
156 gpmc_init();
172 if (power_tps65217_init(0))
173 printf("WARN: cannot setup PMIC 0x24 @ bus #0, not found!.\n");
174
157 return 0;
158}
159
160#ifdef CONFIG_BOARD_LATE_INIT
161int board_late_init(void)
162{
163 const unsigned int toff = 1000;
164 unsigned int cnt = 3;
165 unsigned short buf = 0xAAAA;
166 unsigned char scratchreg = 0;
175 return 0;
176}
177
178#ifdef CONFIG_BOARD_LATE_INIT
179int board_late_init(void)
180{
181 const unsigned int toff = 1000;
182 unsigned int cnt = 3;
183 unsigned short buf = 0xAAAA;
184 unsigned char scratchreg = 0;
167 unsigned int oldspeed;
185 int rc;
168
169 /* try to read out some boot-instruction from resetcontroller */
186
187 /* try to read out some boot-instruction from resetcontroller */
170 oldspeed = i2c_get_bus_speed();
171 if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
172 i2c_read(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
173 &scratchreg, sizeof(scratchreg));
174 i2c_set_bus_speed(oldspeed);
175 } else {
176 puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
177 }
188 rc = rstctrl_rw(RSTCTRL_SCRATCHREG, 1, &scratchreg, sizeof(scratchreg));
189 if (rc != 0)
190 printf("ERROR: read scratchregister (resetc) failed!\n");
178
191
179 if (gpio_get_value(ESC_KEY)) {
192 if (gpio_request(ESC_KEY, "boot-key") != 0) {
193 printf("cannot request boot-key!\n");
194 } else if (gpio_get_value(ESC_KEY)) {
180 do {
181 lcd_position_cursor(1, 8);
182 switch (cnt) {
183 case 3:
184 lcd_puts(
185 "release ESC-KEY to enter SERVICE-mode.");
186 break;
187 case 2:

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261 buf = 0xB4B4;
262 break;
263 case 3:
264 lcd_puts("loading OS... ");
265 buf = 0x0404;
266 break;
267 }
268 /* write bootinfo into scratchregister of resetcontroller */
195 do {
196 lcd_position_cursor(1, 8);
197 switch (cnt) {
198 case 3:
199 lcd_puts(
200 "release ESC-KEY to enter SERVICE-mode.");
201 break;
202 case 2:

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276 buf = 0xB4B4;
277 break;
278 case 3:
279 lcd_puts("loading OS... ");
280 buf = 0x0404;
281 break;
282 }
283 /* write bootinfo into scratchregister of resetcontroller */
269 oldspeed = i2c_get_bus_speed();
270 if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
271 i2c_write(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
272 (uint8_t *)&buf, sizeof(buf));
273 i2c_set_bus_speed(oldspeed);
274 } else {
275 puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
276 }
284 rc = rstctrl_rw(RSTCTRL_SCRATCHREG, 0, (uint8_t *)&buf, sizeof(buf));
285 if (rc != 0)
286 printf("ERROR: write scratchregister (resetc) failed!\n");
287
277 /* setup othbootargs for bootvx-command (vxWorks bootline) */
278 char othbootargs[128];
279 snprintf(othbootargs, sizeof(othbootargs),
280 "u=vxWorksFTP pw=vxWorks o=0x%08x;0x%08x;0x%08x;0x%08x",
281 (unsigned int) gd->fb_base-0x20,
282 (u32)env_get_ulong("vx_memtop", 16, gd->fb_base-0x20),
283 (u32)env_get_ulong("vx_romfsbase", 16, 0),
284 (u32)env_get_ulong("vx_romfssize", 16, 0));
285 env_set("othbootargs", othbootargs);
286 /*
287 * reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
288 * expect that vectors are there, original u-boot moves them to _start
289 */
290 __asm__("ldr r0,=0x20000");
291 __asm__("mcr p15, 0, r0, c12, c0, 0"); /* Set VBAR */
292
293 return 0;
294}
295#endif /* CONFIG_BOARD_LATE_INIT */
288 /* setup othbootargs for bootvx-command (vxWorks bootline) */
289 char othbootargs[128];
290 snprintf(othbootargs, sizeof(othbootargs),
291 "u=vxWorksFTP pw=vxWorks o=0x%08x;0x%08x;0x%08x;0x%08x",
292 (unsigned int) gd->fb_base-0x20,
293 (u32)env_get_ulong("vx_memtop", 16, gd->fb_base-0x20),
294 (u32)env_get_ulong("vx_romfsbase", 16, 0),
295 (u32)env_get_ulong("vx_romfssize", 16, 0));
296 env_set("othbootargs", othbootargs);
297 /*
298 * reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
299 * expect that vectors are there, original u-boot moves them to _start
300 */
301 __asm__("ldr r0,=0x20000");
302 __asm__("mcr p15, 0, r0, c12, c0, 0"); /* Set VBAR */
303
304 return 0;
305}
306#endif /* CONFIG_BOARD_LATE_INIT */