| bayleybay.dts (80af39842e64a44258ab5eb913659e29fc319903) | bayleybay.dts (f2b85ab5e6a91e29c1d64304be371753d75ed172) |
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| 1/* 2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/dts-v1/; 8 --- 51 unchanged lines hidden (view full) --- 60 cpu@3 { 61 device_type = "cpu"; 62 compatible = "intel,baytrail-cpu"; 63 reg = <3>; 64 intel,apic-id = <6>; 65 }; 66 }; 67 | 1/* 2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/dts-v1/; 8 --- 51 unchanged lines hidden (view full) --- 60 cpu@3 { 61 device_type = "cpu"; 62 compatible = "intel,baytrail-cpu"; 63 reg = <3>; 64 intel,apic-id = <6>; 65 }; 66 }; 67 |
| 68 spi { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 compatible = "intel,ich-spi"; 72 spi-flash@0 { 73 #address-cells = <1>; 74 #size-cells = <1>; 75 reg = <0>; 76 compatible = "winbond,w25q64dw", "spi-flash"; 77 memory-map = <0xff800000 0x00800000>; 78 rw-mrc-cache { 79 label = "rw-mrc-cache"; 80 reg = <0x006e0000 0x00010000>; 81 }; 82 }; 83 }; 84 | |
| 85 gpioa { 86 compatible = "intel,ich6-gpio"; 87 u-boot,dm-pre-reloc; 88 reg = <0 0x20>; 89 bank-name = "A"; 90 }; 91 92 gpiob { --- 35 unchanged lines hidden (view full) --- 128 compatible = "pci-x86"; 129 #address-cells = <3>; 130 #size-cells = <2>; 131 u-boot,dm-pre-reloc; 132 ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 133 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 134 0x01000000 0x0 0x2000 0x2000 0 0xe000>; 135 | 68 gpioa { 69 compatible = "intel,ich6-gpio"; 70 u-boot,dm-pre-reloc; 71 reg = <0 0x20>; 72 bank-name = "A"; 73 }; 74 75 gpiob { --- 35 unchanged lines hidden (view full) --- 111 compatible = "pci-x86"; 112 #address-cells = <3>; 113 #size-cells = <2>; 114 u-boot,dm-pre-reloc; 115 ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 116 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 117 0x01000000 0x0 0x2000 0x2000 0 0xe000>; 118 |
| 136 irq-router@1f,0 { | 119 pch@1f,0 { |
| 137 reg = <0x0000f800 0 0 0 0>; | 120 reg = <0x0000f800 0 0 0 0>; |
| 138 compatible = "intel,irq-router"; 139 intel,pirq-config = "ibase"; 140 intel,ibase-offset = <0x50>; 141 intel,pirq-link = <8 8>; 142 intel,pirq-mask = <0xdee0>; 143 intel,pirq-routing = < 144 /* BayTrail PCI devices */ 145 PCI_BDF(0, 2, 0) INTA PIRQA 146 PCI_BDF(0, 3, 0) INTA PIRQA 147 PCI_BDF(0, 16, 0) INTA PIRQA 148 PCI_BDF(0, 17, 0) INTA PIRQA 149 PCI_BDF(0, 18, 0) INTA PIRQA 150 PCI_BDF(0, 19, 0) INTA PIRQA 151 PCI_BDF(0, 20, 0) INTA PIRQA 152 PCI_BDF(0, 21, 0) INTA PIRQA 153 PCI_BDF(0, 22, 0) INTA PIRQA 154 PCI_BDF(0, 23, 0) INTA PIRQA 155 PCI_BDF(0, 24, 0) INTA PIRQA 156 PCI_BDF(0, 24, 1) INTC PIRQC 157 PCI_BDF(0, 24, 2) INTD PIRQD 158 PCI_BDF(0, 24, 3) INTB PIRQB 159 PCI_BDF(0, 24, 4) INTA PIRQA 160 PCI_BDF(0, 24, 5) INTC PIRQC 161 PCI_BDF(0, 24, 6) INTD PIRQD 162 PCI_BDF(0, 24, 7) INTB PIRQB 163 PCI_BDF(0, 26, 0) INTA PIRQA 164 PCI_BDF(0, 27, 0) INTA PIRQA 165 PCI_BDF(0, 28, 0) INTA PIRQA 166 PCI_BDF(0, 28, 1) INTB PIRQB 167 PCI_BDF(0, 28, 2) INTC PIRQC 168 PCI_BDF(0, 28, 3) INTD PIRQD 169 PCI_BDF(0, 29, 0) INTA PIRQA 170 PCI_BDF(0, 30, 0) INTA PIRQA 171 PCI_BDF(0, 30, 1) INTD PIRQD 172 PCI_BDF(0, 30, 2) INTB PIRQB 173 PCI_BDF(0, 30, 3) INTC PIRQC 174 PCI_BDF(0, 30, 4) INTD PIRQD 175 PCI_BDF(0, 30, 5) INTB PIRQB 176 PCI_BDF(0, 31, 3) INTB PIRQB | 121 compatible = "intel,pch9"; |
| 177 | 122 |
| 178 /* PCIe root ports downstream interrupts */ 179 PCI_BDF(1, 0, 0) INTA PIRQA 180 PCI_BDF(1, 0, 0) INTB PIRQB 181 PCI_BDF(1, 0, 0) INTC PIRQC 182 PCI_BDF(1, 0, 0) INTD PIRQD 183 PCI_BDF(2, 0, 0) INTA PIRQB 184 PCI_BDF(2, 0, 0) INTB PIRQC 185 PCI_BDF(2, 0, 0) INTC PIRQD 186 PCI_BDF(2, 0, 0) INTD PIRQA 187 PCI_BDF(3, 0, 0) INTA PIRQC 188 PCI_BDF(3, 0, 0) INTB PIRQD 189 PCI_BDF(3, 0, 0) INTC PIRQA 190 PCI_BDF(3, 0, 0) INTD PIRQB 191 PCI_BDF(4, 0, 0) INTA PIRQD 192 PCI_BDF(4, 0, 0) INTB PIRQA 193 PCI_BDF(4, 0, 0) INTC PIRQB 194 PCI_BDF(4, 0, 0) INTD PIRQC 195 >; | 123 irq-router { 124 compatible = "intel,irq-router"; 125 intel,pirq-config = "ibase"; 126 intel,ibase-offset = <0x50>; 127 intel,pirq-link = <8 8>; 128 intel,pirq-mask = <0xdee0>; 129 intel,pirq-routing = < 130 /* BayTrail PCI devices */ 131 PCI_BDF(0, 2, 0) INTA PIRQA 132 PCI_BDF(0, 3, 0) INTA PIRQA 133 PCI_BDF(0, 16, 0) INTA PIRQA 134 PCI_BDF(0, 17, 0) INTA PIRQA 135 PCI_BDF(0, 18, 0) INTA PIRQA 136 PCI_BDF(0, 19, 0) INTA PIRQA 137 PCI_BDF(0, 20, 0) INTA PIRQA 138 PCI_BDF(0, 21, 0) INTA PIRQA 139 PCI_BDF(0, 22, 0) INTA PIRQA 140 PCI_BDF(0, 23, 0) INTA PIRQA 141 PCI_BDF(0, 24, 0) INTA PIRQA 142 PCI_BDF(0, 24, 1) INTC PIRQC 143 PCI_BDF(0, 24, 2) INTD PIRQD 144 PCI_BDF(0, 24, 3) INTB PIRQB 145 PCI_BDF(0, 24, 4) INTA PIRQA 146 PCI_BDF(0, 24, 5) INTC PIRQC 147 PCI_BDF(0, 24, 6) INTD PIRQD 148 PCI_BDF(0, 24, 7) INTB PIRQB 149 PCI_BDF(0, 26, 0) INTA PIRQA 150 PCI_BDF(0, 27, 0) INTA PIRQA 151 PCI_BDF(0, 28, 0) INTA PIRQA 152 PCI_BDF(0, 28, 1) INTB PIRQB 153 PCI_BDF(0, 28, 2) INTC PIRQC 154 PCI_BDF(0, 28, 3) INTD PIRQD 155 PCI_BDF(0, 29, 0) INTA PIRQA 156 PCI_BDF(0, 30, 0) INTA PIRQA 157 PCI_BDF(0, 30, 1) INTD PIRQD 158 PCI_BDF(0, 30, 2) INTB PIRQB 159 PCI_BDF(0, 30, 3) INTC PIRQC 160 PCI_BDF(0, 30, 4) INTD PIRQD 161 PCI_BDF(0, 30, 5) INTB PIRQB 162 PCI_BDF(0, 31, 3) INTB PIRQB 163 164 /* 165 * PCIe root ports downstream 166 * interrupts 167 */ 168 PCI_BDF(1, 0, 0) INTA PIRQA 169 PCI_BDF(1, 0, 0) INTB PIRQB 170 PCI_BDF(1, 0, 0) INTC PIRQC 171 PCI_BDF(1, 0, 0) INTD PIRQD 172 PCI_BDF(2, 0, 0) INTA PIRQB 173 PCI_BDF(2, 0, 0) INTB PIRQC 174 PCI_BDF(2, 0, 0) INTC PIRQD 175 PCI_BDF(2, 0, 0) INTD PIRQA 176 PCI_BDF(3, 0, 0) INTA PIRQC 177 PCI_BDF(3, 0, 0) INTB PIRQD 178 PCI_BDF(3, 0, 0) INTC PIRQA 179 PCI_BDF(3, 0, 0) INTD PIRQB 180 PCI_BDF(4, 0, 0) INTA PIRQD 181 PCI_BDF(4, 0, 0) INTB PIRQA 182 PCI_BDF(4, 0, 0) INTC PIRQB 183 PCI_BDF(4, 0, 0) INTD PIRQC 184 >; 185 }; 186 187 spi { 188 #address-cells = <1>; 189 #size-cells = <0>; 190 compatible = "intel,ich-spi"; 191 spi-flash@0 { 192 #address-cells = <1>; 193 #size-cells = <1>; 194 reg = <0>; 195 compatible = "winbond,w25q64dw", 196 "spi-flash"; 197 memory-map = <0xff800000 0x00800000>; 198 rw-mrc-cache { 199 label = "rw-mrc-cache"; 200 reg = <0x006e0000 0x00010000>; 201 }; 202 }; 203 }; |
| 196 }; 197 }; 198 199 fsp { 200 compatible = "intel,baytrail-fsp"; 201 fsp,mrc-init-tseg-size = <0>; 202 fsp,mrc-init-mmio-size = <0x800>; 203 fsp,mrc-init-spd-addr1 = <0xa0>; --- 46 unchanged lines hidden --- | 204 }; 205 }; 206 207 fsp { 208 compatible = "intel,baytrail-fsp"; 209 fsp,mrc-init-tseg-size = <0>; 210 fsp,mrc-init-mmio-size = <0x800>; 211 fsp,mrc-init-spd-addr1 = <0xa0>; --- 46 unchanged lines hidden --- |