| r8a7796.dtsi (f72b96ec8f7a7b2e2952333c00d907cf0fd726a3) | r8a7796.dtsi (37a7908137a8c904f43c83f3e6c269cd51bf6126) |
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| 1/* 2 * Device Tree Source for the r8a7796 SoC 3 * 4 * Copyright (C) 2016 Renesas Electronics Corp. 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. --- 108 unchanged lines hidden (view full) --- 117 extalr_clk: extalr { 118 compatible = "fixed-clock"; 119 #clock-cells = <0>; 120 /* This value must be overridden by the board */ 121 clock-frequency = <0>; 122 u-boot,dm-pre-reloc; 123 }; 124 | 1/* 2 * Device Tree Source for the r8a7796 SoC 3 * 4 * Copyright (C) 2016 Renesas Electronics Corp. 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. --- 108 unchanged lines hidden (view full) --- 117 extalr_clk: extalr { 118 compatible = "fixed-clock"; 119 #clock-cells = <0>; 120 /* This value must be overridden by the board */ 121 clock-frequency = <0>; 122 u-boot,dm-pre-reloc; 123 }; 124 |
| 125 /* 126 * The external audio clocks are configured as 0 Hz fixed frequency 127 * clocks by default. 128 * Boards that provide audio clocks should override them. 129 */ 130 audio_clk_a: audio_clk_a { 131 compatible = "fixed-clock"; 132 #clock-cells = <0>; 133 clock-frequency = <0>; 134 }; 135 136 audio_clk_b: audio_clk_b { 137 compatible = "fixed-clock"; 138 #clock-cells = <0>; 139 clock-frequency = <0>; 140 }; 141 142 audio_clk_c: audio_clk_c { 143 compatible = "fixed-clock"; 144 #clock-cells = <0>; 145 clock-frequency = <0>; 146 }; 147 |
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| 125 /* External CAN clock - to be overridden by boards that provide it */ 126 can_clk: can { 127 compatible = "fixed-clock"; 128 #clock-cells = <0>; 129 clock-frequency = <0>; 130 }; 131 132 /* External SCIF clock - to be overridden by boards that provide it */ 133 scif_clk: scif { 134 compatible = "fixed-clock"; 135 #clock-cells = <0>; 136 clock-frequency = <0>; 137 }; 138 | 148 /* External CAN clock - to be overridden by boards that provide it */ 149 can_clk: can { 150 compatible = "fixed-clock"; 151 #clock-cells = <0>; 152 clock-frequency = <0>; 153 }; 154 155 /* External SCIF clock - to be overridden by boards that provide it */ 156 scif_clk: scif { 157 compatible = "fixed-clock"; 158 #clock-cells = <0>; 159 clock-frequency = <0>; 160 }; 161 |
| 162 /* External PCIe clock - can be overridden by the board */ 163 pcie_bus_clk: pcie_bus { 164 compatible = "fixed-clock"; 165 #clock-cells = <0>; 166 clock-frequency = <0>; 167 }; 168 |
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| 139 soc { 140 compatible = "simple-bus"; 141 interrupt-parent = <&gic>; 142 #address-cells = <2>; 143 #size-cells = <2>; 144 ranges; 145 u-boot,dm-pre-reloc; 146 --- 214 unchanged lines hidden (view full) --- 361 compatible = "renesas,iic-r8a7796", 362 "renesas,rcar-gen3-iic", 363 "renesas,rmobile-iic"; 364 reg = <0 0xe60b0000 0 0x425>; 365 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 366 clocks = <&cpg CPG_MOD 926>; 367 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 368 resets = <&cpg 926>; | 169 soc { 170 compatible = "simple-bus"; 171 interrupt-parent = <&gic>; 172 #address-cells = <2>; 173 #size-cells = <2>; 174 ranges; 175 u-boot,dm-pre-reloc; 176 --- 214 unchanged lines hidden (view full) --- 391 compatible = "renesas,iic-r8a7796", 392 "renesas,rcar-gen3-iic", 393 "renesas,rmobile-iic"; 394 reg = <0 0xe60b0000 0 0x425>; 395 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 396 clocks = <&cpg CPG_MOD 926>; 397 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 398 resets = <&cpg 926>; |
| 399 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 400 dma-names = "tx", "rx"; |
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| 369 status = "disabled"; 370 }; 371 | 401 status = "disabled"; 402 }; 403 |
| 404 pwm0: pwm@e6e30000 { 405 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 406 reg = <0 0xe6e30000 0 8>; 407 #pwm-cells = <2>; 408 clocks = <&cpg CPG_MOD 523>; 409 resets = <&cpg 523>; 410 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 411 status = "disabled"; 412 }; 413 414 pwm1: pwm@e6e31000 { 415 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 416 reg = <0 0xe6e31000 0 8>; 417 #pwm-cells = <2>; 418 clocks = <&cpg CPG_MOD 523>; 419 resets = <&cpg 523>; 420 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 421 status = "disabled"; 422 }; 423 424 pwm2: pwm@e6e32000 { 425 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 426 reg = <0 0xe6e32000 0 8>; 427 #pwm-cells = <2>; 428 clocks = <&cpg CPG_MOD 523>; 429 resets = <&cpg 523>; 430 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 431 status = "disabled"; 432 }; 433 434 pwm3: pwm@e6e33000 { 435 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 436 reg = <0 0xe6e33000 0 8>; 437 #pwm-cells = <2>; 438 clocks = <&cpg CPG_MOD 523>; 439 resets = <&cpg 523>; 440 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 441 status = "disabled"; 442 }; 443 444 pwm4: pwm@e6e34000 { 445 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 446 reg = <0 0xe6e34000 0 8>; 447 #pwm-cells = <2>; 448 clocks = <&cpg CPG_MOD 523>; 449 resets = <&cpg 523>; 450 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 451 status = "disabled"; 452 }; 453 454 pwm5: pwm@e6e35000 { 455 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 456 reg = <0 0xe6e35000 0 8>; 457 #pwm-cells = <2>; 458 clocks = <&cpg CPG_MOD 523>; 459 resets = <&cpg 523>; 460 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 461 status = "disabled"; 462 }; 463 464 pwm6: pwm@e6e36000 { 465 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 466 reg = <0 0xe6e36000 0 8>; 467 #pwm-cells = <2>; 468 clocks = <&cpg CPG_MOD 523>; 469 resets = <&cpg 523>; 470 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 471 status = "disabled"; 472 }; 473 |
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| 372 i2c0: i2c@e6500000 { 373 #address-cells = <1>; 374 #size-cells = <0>; 375 compatible = "renesas,i2c-r8a7796", 376 "renesas,rcar-gen3-i2c"; 377 reg = <0 0xe6500000 0 0x40>; 378 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 379 clocks = <&cpg CPG_MOD 931>; --- 550 unchanged lines hidden (view full) --- 930 clocks = <&cpg CPG_MOD 217>; 931 clock-names = "fck"; 932 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 933 resets = <&cpg 217>; 934 #dma-cells = <1>; 935 dma-channels = <16>; 936 }; 937 | 474 i2c0: i2c@e6500000 { 475 #address-cells = <1>; 476 #size-cells = <0>; 477 compatible = "renesas,i2c-r8a7796", 478 "renesas,rcar-gen3-i2c"; 479 reg = <0 0xe6500000 0 0x40>; 480 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 481 clocks = <&cpg CPG_MOD 931>; --- 550 unchanged lines hidden (view full) --- 1032 clocks = <&cpg CPG_MOD 217>; 1033 clock-names = "fck"; 1034 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1035 resets = <&cpg 217>; 1036 #dma-cells = <1>; 1037 dma-channels = <16>; 1038 }; 1039 |
| 1040 audma0: dma-controller@ec700000 { 1041 compatible = "renesas,dmac-r8a7796", 1042 "renesas,rcar-dmac"; 1043 reg = <0 0xec700000 0 0x10000>; 1044 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1045 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1046 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1047 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1048 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1049 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1050 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1051 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1052 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1053 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1054 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1055 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1056 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1057 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1058 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1059 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1060 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1061 interrupt-names = "error", 1062 "ch0", "ch1", "ch2", "ch3", 1063 "ch4", "ch5", "ch6", "ch7", 1064 "ch8", "ch9", "ch10", "ch11", 1065 "ch12", "ch13", "ch14", "ch15"; 1066 clocks = <&cpg CPG_MOD 502>; 1067 clock-names = "fck"; 1068 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1069 resets = <&cpg 502>; 1070 #dma-cells = <1>; 1071 dma-channels = <16>; 1072 }; 1073 1074 audma1: dma-controller@ec720000 { 1075 compatible = "renesas,dmac-r8a7796", 1076 "renesas,rcar-dmac"; 1077 reg = <0 0xec720000 0 0x10000>; 1078 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH 1079 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 1080 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 1081 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 1082 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 1083 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 1084 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 1085 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 1086 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 1087 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 1088 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 1089 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1090 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 1091 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 1092 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH 1093 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 1094 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 1095 interrupt-names = "error", 1096 "ch0", "ch1", "ch2", "ch3", 1097 "ch4", "ch5", "ch6", "ch7", 1098 "ch8", "ch9", "ch10", "ch11", 1099 "ch12", "ch13", "ch14", "ch15"; 1100 clocks = <&cpg CPG_MOD 501>; 1101 clock-names = "fck"; 1102 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1103 resets = <&cpg 501>; 1104 #dma-cells = <1>; 1105 dma-channels = <16>; 1106 }; 1107 1108 hsusb: usb@e6590000 { 1109 /* placeholder */ 1110 }; 1111 1112 xhci0: usb@ee000000 { 1113 /* placeholder */ 1114 }; 1115 1116 ohci0: usb@ee080000 { 1117 /* placeholder */ 1118 }; 1119 1120 ehci0: usb@ee080100 { 1121 /* placeholder */ 1122 }; 1123 1124 usb2_phy0: usb-phy@ee080200 { 1125 /* placeholder */ 1126 }; 1127 1128 ohci1: usb@ee0a0000 { 1129 /* placeholder */ 1130 }; 1131 1132 ehci1: usb@ee0a0100 { 1133 /* placeholder */ 1134 }; 1135 1136 usb2_phy1: usb-phy@ee0a0200 { 1137 /* placeholder */ 1138 }; 1139 |
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| 938 sdhi0: sd@ee100000 { 939 compatible = "renesas,sdhi-r8a7796"; 940 reg = <0 0xee100000 0 0x2000>; 941 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 942 clocks = <&cpg CPG_MOD 314>; 943 max-frequency = <200000000>; 944 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 945 resets = <&cpg 314>; --- 86 unchanged lines hidden (view full) --- 1032 sensor3_crit: sensor3-crit { 1033 temperature = <120000>; 1034 hysteresis = <2000>; 1035 type = "critical"; 1036 }; 1037 }; 1038 }; 1039 }; | 1140 sdhi0: sd@ee100000 { 1141 compatible = "renesas,sdhi-r8a7796"; 1142 reg = <0 0xee100000 0 0x2000>; 1143 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1144 clocks = <&cpg CPG_MOD 314>; 1145 max-frequency = <200000000>; 1146 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1147 resets = <&cpg 314>; --- 86 unchanged lines hidden (view full) --- 1234 sensor3_crit: sensor3-crit { 1235 temperature = <120000>; 1236 hysteresis = <2000>; 1237 type = "critical"; 1238 }; 1239 }; 1240 }; 1241 }; |
| 1242 1243 rcar_sound: sound@ec500000 { 1244 /* 1245 * #sound-dai-cells is required 1246 * 1247 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1248 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1249 */ 1250 /* 1251 * #clock-cells is required for audio_clkout0/1/2/3 1252 * 1253 * clkout : #clock-cells = <0>; <&rcar_sound>; 1254 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1255 */ 1256 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1257 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1258 <0 0xec5a0000 0 0x100>, /* ADG */ 1259 <0 0xec540000 0 0x1000>, /* SSIU */ 1260 <0 0xec541000 0 0x280>, /* SSI */ 1261 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1262 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1263 1264 clocks = <&cpg CPG_MOD 1005>, 1265 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1266 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1267 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1268 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1269 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1270 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1271 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1272 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1273 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1274 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1275 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1276 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1277 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1278 <&audio_clk_a>, <&audio_clk_b>, 1279 <&audio_clk_c>, 1280 <&cpg CPG_CORE R8A7796_CLK_S0D4>; 1281 clock-names = "ssi-all", 1282 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1283 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1284 "ssi.1", "ssi.0", 1285 "src.9", "src.8", "src.7", "src.6", 1286 "src.5", "src.4", "src.3", "src.2", 1287 "src.1", "src.0", 1288 "mix.1", "mix.0", 1289 "ctu.1", "ctu.0", 1290 "dvc.0", "dvc.1", 1291 "clk_a", "clk_b", "clk_c", "clk_i"; 1292 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1293 resets = <&cpg 1005>, 1294 <&cpg 1006>, <&cpg 1007>, 1295 <&cpg 1008>, <&cpg 1009>, 1296 <&cpg 1010>, <&cpg 1011>, 1297 <&cpg 1012>, <&cpg 1013>, 1298 <&cpg 1014>, <&cpg 1015>; 1299 reset-names = "ssi-all", 1300 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1301 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1302 "ssi.1", "ssi.0"; 1303 status = "disabled"; 1304 1305 rcar_sound,dvc { 1306 dvc0: dvc-0 { 1307 dmas = <&audma1 0xbc>; 1308 dma-names = "tx"; 1309 }; 1310 dvc1: dvc-1 { 1311 dmas = <&audma1 0xbe>; 1312 dma-names = "tx"; 1313 }; 1314 }; 1315 1316 rcar_sound,mix { 1317 mix0: mix-0 { }; 1318 mix1: mix-1 { }; 1319 }; 1320 1321 rcar_sound,ctu { 1322 ctu00: ctu-0 { }; 1323 ctu01: ctu-1 { }; 1324 ctu02: ctu-2 { }; 1325 ctu03: ctu-3 { }; 1326 ctu10: ctu-4 { }; 1327 ctu11: ctu-5 { }; 1328 ctu12: ctu-6 { }; 1329 ctu13: ctu-7 { }; 1330 }; 1331 1332 rcar_sound,src { 1333 src0: src-0 { 1334 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1335 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1336 dma-names = "rx", "tx"; 1337 }; 1338 src1: src-1 { 1339 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1340 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1341 dma-names = "rx", "tx"; 1342 }; 1343 src2: src-2 { 1344 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1345 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1346 dma-names = "rx", "tx"; 1347 }; 1348 src3: src-3 { 1349 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1350 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1351 dma-names = "rx", "tx"; 1352 }; 1353 src4: src-4 { 1354 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1355 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1356 dma-names = "rx", "tx"; 1357 }; 1358 src5: src-5 { 1359 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1360 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1361 dma-names = "rx", "tx"; 1362 }; 1363 src6: src-6 { 1364 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1365 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1366 dma-names = "rx", "tx"; 1367 }; 1368 src7: src-7 { 1369 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1370 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1371 dma-names = "rx", "tx"; 1372 }; 1373 src8: src-8 { 1374 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1375 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1376 dma-names = "rx", "tx"; 1377 }; 1378 src9: src-9 { 1379 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1380 dmas = <&audma0 0x97>, <&audma1 0xba>; 1381 dma-names = "rx", "tx"; 1382 }; 1383 }; 1384 1385 rcar_sound,ssi { 1386 ssi0: ssi-0 { 1387 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1388 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1389 dma-names = "rx", "tx", "rxu", "txu"; 1390 }; 1391 ssi1: ssi-1 { 1392 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1393 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1394 dma-names = "rx", "tx", "rxu", "txu"; 1395 }; 1396 ssi2: ssi-2 { 1397 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1398 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1399 dma-names = "rx", "tx", "rxu", "txu"; 1400 }; 1401 ssi3: ssi-3 { 1402 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1403 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1404 dma-names = "rx", "tx", "rxu", "txu"; 1405 }; 1406 ssi4: ssi-4 { 1407 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1408 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1409 dma-names = "rx", "tx", "rxu", "txu"; 1410 }; 1411 ssi5: ssi-5 { 1412 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1413 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1414 dma-names = "rx", "tx", "rxu", "txu"; 1415 }; 1416 ssi6: ssi-6 { 1417 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1418 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1419 dma-names = "rx", "tx", "rxu", "txu"; 1420 }; 1421 ssi7: ssi-7 { 1422 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1423 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1424 dma-names = "rx", "tx", "rxu", "txu"; 1425 }; 1426 ssi8: ssi-8 { 1427 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1428 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1429 dma-names = "rx", "tx", "rxu", "txu"; 1430 }; 1431 ssi9: ssi-9 { 1432 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1433 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1434 dma-names = "rx", "tx", "rxu", "txu"; 1435 }; 1436 }; 1437 }; 1438 1439 pciec0: pcie@fe000000 { 1440 /* placeholder */ 1441 }; 1442 1443 pciec1: pcie@ee800000 { 1444 /* placeholder */ 1445 }; 1446 1447 du: display@feb00000 { 1448 /* placeholder */ 1449 1450 ports { 1451 #address-cells = <1>; 1452 #size-cells = <0>; 1453 1454 port@0 { 1455 reg = <0>; 1456 du_out_rgb: endpoint { 1457 }; 1458 }; 1459 }; 1460 }; |
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| 1040 }; 1041}; | 1461 }; 1462}; |