r8a7795.dtsi (f72b96ec8f7a7b2e2952333c00d907cf0fd726a3) r8a7795.dtsi (37a7908137a8c904f43c83f3e6c269cd51bf6126)
1/*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.

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179
180 /* External PCIe clock - can be overridden by the board */
181 pcie_bus_clk: pcie_bus {
182 compatible = "fixed-clock";
183 #clock-cells = <0>;
184 clock-frequency = <0>;
185 };
186
1/*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.

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179
180 /* External PCIe clock - can be overridden by the board */
181 pcie_bus_clk: pcie_bus {
182 compatible = "fixed-clock";
183 #clock-cells = <0>;
184 clock-frequency = <0>;
185 };
186
187 soc {
187 soc: soc {
188 compatible = "simple-bus";
189 interrupt-parent = <&gic>;
190
191 #address-cells = <2>;
192 #size-cells = <2>;
193 ranges;
194 u-boot,dm-pre-reloc;
195

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397 };
398
399 sysc: system-controller@e6180000 {
400 compatible = "renesas,r8a7795-sysc";
401 reg = <0 0xe6180000 0 0x0400>;
402 #power-domain-cells = <1>;
403 };
404
188 compatible = "simple-bus";
189 interrupt-parent = <&gic>;
190
191 #address-cells = <2>;
192 #size-cells = <2>;
193 ranges;
194 u-boot,dm-pre-reloc;
195

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397 };
398
399 sysc: system-controller@e6180000 {
400 compatible = "renesas,r8a7795-sysc";
401 reg = <0 0xe6180000 0 0x0400>;
402 #power-domain-cells = <1>;
403 };
404
405 pfc: pfc@e6060000 {
405 pfc: pin-controller@e6060000 {
406 compatible = "renesas,pfc-r8a7795";
407 reg = <0 0xe6060000 0 0x50c>;
408 };
409
410 intc_ex: interrupt-controller@e61c0000 {
411 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
412 #interrupt-cells = <2>;
413 interrupt-controller;

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882 compatible = "renesas,iic-r8a7795",
883 "renesas,rcar-gen3-iic",
884 "renesas,rmobile-iic";
885 reg = <0 0xe60b0000 0 0x425>;
886 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
887 clocks = <&cpg CPG_MOD 926>;
888 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
889 resets = <&cpg 926>;
406 compatible = "renesas,pfc-r8a7795";
407 reg = <0 0xe6060000 0 0x50c>;
408 };
409
410 intc_ex: interrupt-controller@e61c0000 {
411 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
412 #interrupt-cells = <2>;
413 interrupt-controller;

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882 compatible = "renesas,iic-r8a7795",
883 "renesas,rcar-gen3-iic",
884 "renesas,rmobile-iic";
885 reg = <0 0xe60b0000 0 0x425>;
886 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
887 clocks = <&cpg CPG_MOD 926>;
888 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
889 resets = <&cpg 926>;
890 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
891 dma-names = "tx", "rx";
890 status = "disabled";
891 };
892
893 i2c0: i2c@e6500000 {
894 #address-cells = <1>;
895 #size-cells = <0>;
896 compatible = "renesas,i2c-r8a7795",
897 "renesas,rcar-gen3-i2c";

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1117 "src.9", "src.8", "src.7", "src.6",
1118 "src.5", "src.4", "src.3", "src.2",
1119 "src.1", "src.0",
1120 "mix.1", "mix.0",
1121 "ctu.1", "ctu.0",
1122 "dvc.0", "dvc.1",
1123 "clk_a", "clk_b", "clk_c", "clk_i";
1124 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
892 status = "disabled";
893 };
894
895 i2c0: i2c@e6500000 {
896 #address-cells = <1>;
897 #size-cells = <0>;
898 compatible = "renesas,i2c-r8a7795",
899 "renesas,rcar-gen3-i2c";

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1119 "src.9", "src.8", "src.7", "src.6",
1120 "src.5", "src.4", "src.3", "src.2",
1121 "src.1", "src.0",
1122 "mix.1", "mix.0",
1123 "ctu.1", "ctu.0",
1124 "dvc.0", "dvc.1",
1125 "clk_a", "clk_b", "clk_c", "clk_i";
1126 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1127 resets = <&cpg 1005>,
1128 <&cpg 1006>, <&cpg 1007>,
1129 <&cpg 1008>, <&cpg 1009>,
1130 <&cpg 1010>, <&cpg 1011>,
1131 <&cpg 1012>, <&cpg 1013>,
1132 <&cpg 1014>, <&cpg 1015>;
1133 reset-names = "ssi-all",
1134 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1135 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1136 "ssi.1", "ssi.0";
1125 status = "disabled";
1126
1127 rcar_sound,dvc {
1128 dvc0: dvc-0 {
1129 dmas = <&audma1 0xbc>;
1130 dma-names = "tx";
1131 };
1132 dvc1: dvc-1 {

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1273 reg = <0 0xee000000 0 0xc00>;
1274 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1275 clocks = <&cpg CPG_MOD 328>;
1276 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1277 resets = <&cpg 328>;
1278 status = "disabled";
1279 };
1280
1137 status = "disabled";
1138
1139 rcar_sound,dvc {
1140 dvc0: dvc-0 {
1141 dmas = <&audma1 0xbc>;
1142 dma-names = "tx";
1143 };
1144 dvc1: dvc-1 {

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1285 reg = <0 0xee000000 0 0xc00>;
1286 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1287 clocks = <&cpg CPG_MOD 328>;
1288 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1289 resets = <&cpg 328>;
1290 status = "disabled";
1291 };
1292
1281 xhci1: usb@ee0400000 {
1282 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1283 reg = <0 0xee040000 0 0xc00>;
1284 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1285 clocks = <&cpg CPG_MOD 327>;
1286 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1287 resets = <&cpg 327>;
1288 status = "disabled";
1289 };
1290
1291 usb_dmac0: dma-controller@e65a0000 {
1292 compatible = "renesas,r8a7795-usb-dmac",
1293 "renesas,usb-dmac";
1294 reg = <0 0xe65a0000 0 0x100>;
1295 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1296 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1297 interrupt-names = "ch0", "ch1";
1298 clocks = <&cpg CPG_MOD 330>;

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1567 fcpf1: fcp@fe951000 {
1568 compatible = "renesas,fcpf";
1569 reg = <0 0xfe951000 0 0x200>;
1570 clocks = <&cpg CPG_MOD 614>;
1571 power-domains = <&sysc R8A7795_PD_A3VP>;
1572 resets = <&cpg 614>;
1573 };
1574
1293 usb_dmac0: dma-controller@e65a0000 {
1294 compatible = "renesas,r8a7795-usb-dmac",
1295 "renesas,usb-dmac";
1296 reg = <0 0xe65a0000 0 0x100>;
1297 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1298 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1299 interrupt-names = "ch0", "ch1";
1300 clocks = <&cpg CPG_MOD 330>;

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1569 fcpf1: fcp@fe951000 {
1570 compatible = "renesas,fcpf";
1571 reg = <0 0xfe951000 0 0x200>;
1572 clocks = <&cpg CPG_MOD 614>;
1573 power-domains = <&sysc R8A7795_PD_A3VP>;
1574 resets = <&cpg 614>;
1575 };
1576
1575 fcpf2: fcp@fe952000 {
1576 compatible = "renesas,fcpf";
1577 reg = <0 0xfe952000 0 0x200>;
1578 clocks = <&cpg CPG_MOD 613>;
1579 power-domains = <&sysc R8A7795_PD_A3VP>;
1580 resets = <&cpg 613>;
1581 };
1582
1583 vspbd: vsp@fe960000 {
1584 compatible = "renesas,vsp2";
1585 reg = <0 0xfe960000 0 0x8000>;
1586 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1587 clocks = <&cpg CPG_MOD 626>;
1588 power-domains = <&sysc R8A7795_PD_A3VP>;
1589 resets = <&cpg 626>;
1590

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1632 fcpvi1: fcp@fe9bf000 {
1633 compatible = "renesas,fcpv";
1634 reg = <0 0xfe9bf000 0 0x200>;
1635 clocks = <&cpg CPG_MOD 610>;
1636 power-domains = <&sysc R8A7795_PD_A3VP>;
1637 resets = <&cpg 610>;
1638 };
1639
1577 vspbd: vsp@fe960000 {
1578 compatible = "renesas,vsp2";
1579 reg = <0 0xfe960000 0 0x8000>;
1580 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1581 clocks = <&cpg CPG_MOD 626>;
1582 power-domains = <&sysc R8A7795_PD_A3VP>;
1583 resets = <&cpg 626>;
1584

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1626 fcpvi1: fcp@fe9bf000 {
1627 compatible = "renesas,fcpv";
1628 reg = <0 0xfe9bf000 0 0x200>;
1629 clocks = <&cpg CPG_MOD 610>;
1630 power-domains = <&sysc R8A7795_PD_A3VP>;
1631 resets = <&cpg 610>;
1632 };
1633
1640 vspi2: vsp@fe9c0000 {
1641 compatible = "renesas,vsp2";
1642 reg = <0 0xfe9c0000 0 0x8000>;
1643 interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1644 clocks = <&cpg CPG_MOD 629>;
1645 power-domains = <&sysc R8A7795_PD_A3VP>;
1646 resets = <&cpg 629>;
1647
1648 renesas,fcp = <&fcpvi2>;
1649 };
1650
1651 fcpvi2: fcp@fe9cf000 {
1652 compatible = "renesas,fcpv";
1653 reg = <0 0xfe9cf000 0 0x200>;
1654 clocks = <&cpg CPG_MOD 609>;
1655 power-domains = <&sysc R8A7795_PD_A3VP>;
1656 resets = <&cpg 609>;
1657 };
1658
1659 vspd0: vsp@fea20000 {
1660 compatible = "renesas,vsp2";
1661 reg = <0 0xfea20000 0 0x4000>;
1662 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1663 clocks = <&cpg CPG_MOD 623>;
1664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1665 resets = <&cpg 623>;
1666

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1708 fcpvd2: fcp@fea37000 {
1709 compatible = "renesas,fcpv";
1710 reg = <0 0xfea37000 0 0x200>;
1711 clocks = <&cpg CPG_MOD 601>;
1712 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1713 resets = <&cpg 601>;
1714 };
1715
1634 vspd0: vsp@fea20000 {
1635 compatible = "renesas,vsp2";
1636 reg = <0 0xfea20000 0 0x4000>;
1637 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1638 clocks = <&cpg CPG_MOD 623>;
1639 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1640 resets = <&cpg 623>;
1641

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1683 fcpvd2: fcp@fea37000 {
1684 compatible = "renesas,fcpv";
1685 reg = <0 0xfea37000 0 0x200>;
1686 clocks = <&cpg CPG_MOD 601>;
1687 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1688 resets = <&cpg 601>;
1689 };
1690
1716 vspd3: vsp@fea38000 {
1717 compatible = "renesas,vsp2";
1718 reg = <0 0xfea38000 0 0x4000>;
1719 interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1720 clocks = <&cpg CPG_MOD 620>;
1721 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1722 resets = <&cpg 620>;
1723
1724 renesas,fcp = <&fcpvd3>;
1725 };
1726
1727 fcpvd3: fcp@fea3f000 {
1728 compatible = "renesas,fcpv";
1729 reg = <0 0xfea3f000 0 0x200>;
1730 clocks = <&cpg CPG_MOD 600>;
1731 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1732 resets = <&cpg 600>;
1733 };
1734
1735 fdp1@fe940000 {
1736 compatible = "renesas,fdp1";
1737 reg = <0 0xfe940000 0 0x2400>;
1738 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1739 clocks = <&cpg CPG_MOD 119>;
1740 power-domains = <&sysc R8A7795_PD_A3VP>;
1741 resets = <&cpg 119>;
1742 renesas,fcp = <&fcpf0>;

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1747 reg = <0 0xfe944000 0 0x2400>;
1748 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1749 clocks = <&cpg CPG_MOD 118>;
1750 power-domains = <&sysc R8A7795_PD_A3VP>;
1751 resets = <&cpg 118>;
1752 renesas,fcp = <&fcpf1>;
1753 };
1754
1691 fdp1@fe940000 {
1692 compatible = "renesas,fdp1";
1693 reg = <0 0xfe940000 0 0x2400>;
1694 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1695 clocks = <&cpg CPG_MOD 119>;
1696 power-domains = <&sysc R8A7795_PD_A3VP>;
1697 resets = <&cpg 119>;
1698 renesas,fcp = <&fcpf0>;

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1703 reg = <0 0xfe944000 0 0x2400>;
1704 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1705 clocks = <&cpg CPG_MOD 118>;
1706 power-domains = <&sysc R8A7795_PD_A3VP>;
1707 resets = <&cpg 118>;
1708 renesas,fcp = <&fcpf1>;
1709 };
1710
1755 fdp1@fe948000 {
1756 compatible = "renesas,fdp1";
1757 reg = <0 0xfe948000 0 0x2400>;
1758 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1759 clocks = <&cpg CPG_MOD 117>;
1760 power-domains = <&sysc R8A7795_PD_A3VP>;
1761 resets = <&cpg 117>;
1762 renesas,fcp = <&fcpf2>;
1711 hdmi0: hdmi0@fead0000 {
1712 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
1713 reg = <0 0xfead0000 0 0x10000>;
1714 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
1715 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
1716 clock-names = "iahb", "isfr";
1717 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1718 resets = <&cpg 729>;
1719 status = "disabled";
1720
1721 ports {
1722 #address-cells = <1>;
1723 #size-cells = <0>;
1724 port@0 {
1725 reg = <0>;
1726 dw_hdmi0_in: endpoint {
1727 remote-endpoint = <&du_out_hdmi0>;
1728 };
1729 };
1730 port@1 {
1731 reg = <1>;
1732 };
1733 };
1763 };
1764
1734 };
1735
1736 hdmi1: hdmi1@feae0000 {
1737 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
1738 reg = <0 0xfeae0000 0 0x10000>;
1739 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
1740 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
1741 clock-names = "iahb", "isfr";
1742 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1743 resets = <&cpg 728>;
1744 status = "disabled";
1745
1746 ports {
1747 #address-cells = <1>;
1748 #size-cells = <0>;
1749 port@0 {
1750 reg = <0>;
1751 dw_hdmi1_in: endpoint {
1752 remote-endpoint = <&du_out_hdmi1>;
1753 };
1754 };
1755 port@1 {
1756 reg = <1>;
1757 };
1758 };
1759 };
1760
1765 du: display@feb00000 {
1761 du: display@feb00000 {
1766 compatible = "renesas,du-r8a7795";
1767 reg = <0 0xfeb00000 0 0x80000>,
1768 <0 0xfeb90000 0 0x14>;
1769 reg-names = "du", "lvds.0";
1770 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1771 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1772 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1773 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1774 clocks = <&cpg CPG_MOD 724>,
1775 <&cpg CPG_MOD 723>,
1776 <&cpg CPG_MOD 722>,
1777 <&cpg CPG_MOD 721>,
1778 <&cpg CPG_MOD 727>;
1779 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1780 status = "disabled";
1781
1762 reg = <0 0xfeb00000 0 0x80000>,
1763 <0 0xfeb90000 0 0x14>;
1764 reg-names = "du", "lvds.0";
1765 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1766 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1767 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1768 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1769 clocks = <&cpg CPG_MOD 724>,
1770 <&cpg CPG_MOD 723>,
1771 <&cpg CPG_MOD 722>,
1772 <&cpg CPG_MOD 721>,
1773 <&cpg CPG_MOD 727>;
1774 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1775 status = "disabled";
1776
1782 vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1783
1784 ports {
1785 #address-cells = <1>;
1786 #size-cells = <0>;
1787
1788 port@0 {
1789 reg = <0>;
1790 du_out_rgb: endpoint {
1791 };
1792 };
1793 port@1 {
1794 reg = <1>;
1795 du_out_hdmi0: endpoint {
1777 ports {
1778 #address-cells = <1>;
1779 #size-cells = <0>;
1780
1781 port@0 {
1782 reg = <0>;
1783 du_out_rgb: endpoint {
1784 };
1785 };
1786 port@1 {
1787 reg = <1>;
1788 du_out_hdmi0: endpoint {
1789 remote-endpoint = <&dw_hdmi0_in>;
1796 };
1797 };
1798 port@2 {
1799 reg = <2>;
1800 du_out_hdmi1: endpoint {
1790 };
1791 };
1792 port@2 {
1793 reg = <2>;
1794 du_out_hdmi1: endpoint {
1795 remote-endpoint = <&dw_hdmi1_in>;
1801 };
1802 };
1803 port@3 {
1804 reg = <3>;
1805 du_out_lvds0: endpoint {
1806 };
1807 };
1808 };

--- 62 unchanged lines hidden --- 		1796 };
1797 };
1798 port@3 {
1799 reg = <3>;
1800 du_out_lvds0: endpoint {
1801 };
1802 };
1803 };

--- 62 unchanged lines hidden ---