ast2600.dtsi (e22ef80df47fa277d28ede446c95d753c0a0b4d0) ast2600.dtsi (f51926ee5d03bcf9606a4b14bf6c5e8e66a81f59)
1// SPDX-License-Identifier: GPL-2.0+
2#include <dt-bindings/interrupt-controller/arm-gic.h>
3#include "skeleton.dtsi"
4
5/ {
6 model = "Aspeed BMC";
7 compatible = "aspeed,ast2600";
8 #address-cells = <1>;

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294 };
295
296 gfx: display@1e6e6000 {
297 compatible = "aspeed,ast2500-gfx", "syscon";
298 reg = <0x1e6e6000 0x1000>;
299 reg-io-width = <4>;
300 };
301
1// SPDX-License-Identifier: GPL-2.0+
2#include <dt-bindings/interrupt-controller/arm-gic.h>
3#include "skeleton.dtsi"
4
5/ {
6 model = "Aspeed BMC";
7 compatible = "aspeed,ast2600";
8 #address-cells = <1>;

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294 };
295
296 gfx: display@1e6e6000 {
297 compatible = "aspeed,ast2500-gfx", "syscon";
298 reg = <0x1e6e6000 0x1000>;
299 reg-io-width = <4>;
300 };
301
302 sdhci: sdhci@1e740000 {
303 #interrupt-cells = <1>;
304 compatible = "aspeed,aspeed-sdhci-irq", "simple-mfd";
305 reg = <0x1e740000 0x1000>;
306 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
307 interrupt-controller;
308 clocks = <&scu ASPEED_CLK_GATE_SDCLK>, <&scu ASPEED_CLK_GATE_SDEXTCLK>;
309 clock-names = "ctrlclk", "extclk";
310 #address-cells = <1>;
311 #size-cells = <1>;
312 ranges = <0x0 0x1e740000 0x1000>;
313
314 sdhci_slot0: sdhci_slot0@100 {
315 compatible = "aspeed,sdhci-ast2600";
316 reg = <0x100 0x100>;
317 interrupts = <0>;
318 interrupt-parent = <&sdhci>;
319 sdhci,auto-cmd12;
320 clocks = <&scu ASPEED_CLK_SDIO>;
321#if 0
322 power-gpio = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_LOW>;
323 power-switch-gpio = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_LOW>;
324#endif
325 status = "disabled";
326 };
327
328 sdhci_slot1: sdhci_slot1@200 {
329 compatible = "aspeed,sdhci-ast2600";
330 reg = <0x200 0x100>;
331 interrupts = <1>;
332 interrupt-parent = <&sdhci>;
333 sdhci,auto-cmd12;
334 clocks = <&scu ASPEED_CLK_SDIO>;
335#if 0
336 power-gpio = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_LOW>;
337 power-switch-gpio = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_LOW>;
338#endif
339 status = "disabled";
340 };
341
342 };
343
344 emmc: emmc@1e750000 {
345 #interrupt-cells = <1>;
346 compatible = "aspeed,aspeed-emmc-irq", "simple-mfd";
347 reg = <0x1e750000 0x1000>;
348 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
349 interrupt-controller;
350 clocks = <&scu ASPEED_CLK_GATE_EMMCCLK>, <&scu ASPEED_CLK_GATE_EMMCEXTCLK>;
351 clock-names = "ctrlclk", "extclk";
352 #address-cells = <1>;
353 #size-cells = <1>;
354 ranges = <0x0 0x1e750000 0x1000>;
355
356 emmc_slot0: emmc_slot0@100 {
357 compatible = "aspeed,emmc-ast2600";
358 reg = <0x100 0x100>;
359 interrupts = <0>;
360 interrupt-parent = <&emmc>;
361 clocks = <&scu ASPEED_CLK_EMMC>;
362 status = "disabled";
363 };
364
365 };
366
302 uart1: serial@1e783000 {
303 compatible = "ns16550a";
304 reg = <0x1e783000 0x20>;
305 reg-shift = <2>;
306 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
307 clocks = <&scu ASPEED_CLK_GATE_UART1CLK>;
308 no-loopback-test;
309 status = "disabled";

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572 };
573
574};
575
576&i2c {
577 i2cglobal: i2cg@00 {
578 compatible = "aspeed,ast2600-i2c-global";
579 reg = <0x0 0x40>;
367 uart1: serial@1e783000 {
368 compatible = "ns16550a";
369 reg = <0x1e783000 0x20>;
370 reg-shift = <2>;
371 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
372 clocks = <&scu ASPEED_CLK_GATE_UART1CLK>;
373 no-loopback-test;
374 status = "disabled";

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637 };
638
639};
640
641&i2c {
642 i2cglobal: i2cg@00 {
643 compatible = "aspeed,ast2600-i2c-global";
644 reg = <0x0 0x40>;
580
645 resets = <&rst ASPEED_RESET_I2C>;
581#if 0
582 new-mode;
583#endif
584 };
585
586 i2c0: i2c@80 {
587 #address-cells = <1>;
588 #size-cells = <0>;

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1407 groups = "SD1";
1408 };
1409
1410 pinctrl_sd2_default: sd2_default {
1411 function = "SD2";
1412 groups = "SD2";
1413 };
1414
646#if 0
647 new-mode;
648#endif
649 };
650
651 i2c0: i2c@80 {
652 #address-cells = <1>;
653 #size-cells = <0>;

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1472 groups = "SD1";
1473 };
1474
1475 pinctrl_sd2_default: sd2_default {
1476 function = "SD2";
1477 groups = "SD2";
1478 };
1479
1480 pinctrl_emmc_default: emmc_default {
1481 function = "EMMC";
1482 groups = "EMMC";
1483 };
1484
1415 pinctrl_sda1_default: sda1_default {
1416 function = "SDA1";
1417 groups = "SDA1";
1418 };
1419
1420 pinctrl_sda2_default: sda2_default {
1421 function = "SDA2";
1422 groups = "SDA2";

--- 207 unchanged lines hidden --- 		1485 pinctrl_sda1_default: sda1_default {
1486 function = "SDA1";
1487 groups = "SDA1";
1488 };
1489
1490 pinctrl_sda2_default: sda2_default {
1491 function = "SDA2";
1492 groups = "SDA2";

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