tcg-target.c.inc (6a6d772e30d62e209587ef341df243e9789f5a9f) tcg-target.c.inc (5e3d0c199f4edf4ecdf8100464da441c60ce36e3)
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2009, 2011 Stefan Weil
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights

--- 186 unchanged lines hidden (view full) ---

195 TCG_REG_R15,
196 TCG_REG_R1,
197 TCG_REG_R0,
198};
199
200/* No call arguments via registers. All will be stored on the "stack". */
201static const int tcg_target_call_iarg_regs[] = { };
202
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2009, 2011 Stefan Weil
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights

--- 186 unchanged lines hidden (view full) ---

195 TCG_REG_R15,
196 TCG_REG_R1,
197 TCG_REG_R0,
198};
199
200/* No call arguments via registers. All will be stored on the "stack". */
201static const int tcg_target_call_iarg_regs[] = { };
202
203static const int tcg_target_call_oarg_regs[] = {
204 TCG_REG_R0,
205#if TCG_TARGET_REG_BITS == 32
206 TCG_REG_R1
207#endif
208};
203static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
204{
205 tcg_debug_assert(kind == TCG_CALL_RET_NORMAL);
206 tcg_debug_assert(slot >= 0 && slot < 64 / TCG_TARGET_REG_BITS);
207 return TCG_REG_R0 + slot;
208}
209
210#ifdef CONFIG_DEBUG_TCG
211static const char *const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
212 "r00",
213 "r01",
214 "r02",
215 "r03",
216 "r04",

--- 651 unchanged lines hidden --- 		209
210#ifdef CONFIG_DEBUG_TCG
211static const char *const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
212 "r00",
213 "r01",
214 "r02",
215 "r03",
216 "r04",

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