tcg-target.c.inc (6a6d772e30d62e209587ef341df243e9789f5a9f) tcg-target.c.inc (5e3d0c199f4edf4ecdf8100464da441c60ce36e3)
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008-2009 Arnaud Patard <arnaud.patard@rtp-net.org>
5 * Copyright (c) 2009 Aurelien Jarno <aurelien@aurel32.net>
6 * Based on i386/tcg-target.c - Copyright (c) 2008 Fabrice Bellard
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy

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131#if _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
132 TCG_REG_T0,
133 TCG_REG_T1,
134 TCG_REG_T2,
135 TCG_REG_T3,
136#endif
137};
138
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008-2009 Arnaud Patard <arnaud.patard@rtp-net.org>
5 * Copyright (c) 2009 Aurelien Jarno <aurelien@aurel32.net>
6 * Based on i386/tcg-target.c - Copyright (c) 2008 Fabrice Bellard
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy

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131#if _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
132 TCG_REG_T0,
133 TCG_REG_T1,
134 TCG_REG_T2,
135 TCG_REG_T3,
136#endif
137};
138
139static const TCGReg tcg_target_call_oarg_regs[2] = {
140 TCG_REG_V0,
141 TCG_REG_V1
142};
139static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
140{
141 tcg_debug_assert(kind == TCG_CALL_RET_NORMAL);
142 tcg_debug_assert(slot >= 0 && slot <= 1);
143 return TCG_REG_V0 + slot;
144}
143
144static const tcg_insn_unit *tb_ret_addr;
145static const tcg_insn_unit *bswap32_addr;
146static const tcg_insn_unit *bswap32u_addr;
147static const tcg_insn_unit *bswap64_addr;
148
149static bool reloc_pc16(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
150{

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146static const tcg_insn_unit *tb_ret_addr;
147static const tcg_insn_unit *bswap32_addr;
148static const tcg_insn_unit *bswap32u_addr;
149static const tcg_insn_unit *bswap64_addr;
150
151static bool reloc_pc16(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
152{

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