tcg-target.c.inc (6a6d772e30d62e209587ef341df243e9789f5a9f) tcg-target.c.inc (5e3d0c199f4edf4ecdf8100464da441c60ce36e3)
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Andrzej Zaborowski
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights

--- 65 unchanged lines hidden (view full) ---

74 TCG_REG_Q13,
75 TCG_REG_Q14,
76 TCG_REG_Q15,
77};
78
79static const int tcg_target_call_iarg_regs[4] = {
80 TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3
81};
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Andrzej Zaborowski
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights

--- 65 unchanged lines hidden (view full) ---

74 TCG_REG_Q13,
75 TCG_REG_Q14,
76 TCG_REG_Q15,
77};
78
79static const int tcg_target_call_iarg_regs[4] = {
80 TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3
81};
82static const int tcg_target_call_oarg_regs[2] = {
83 TCG_REG_R0, TCG_REG_R1
84};
85
82
83static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
84{
85 tcg_debug_assert(kind == TCG_CALL_RET_NORMAL);
86 tcg_debug_assert(slot >= 0 && slot <= 3);
87 return TCG_REG_R0 + slot;
88}
89
86#define TCG_REG_TMP TCG_REG_R12
87#define TCG_VEC_TMP TCG_REG_Q15
88#ifndef CONFIG_SOFTMMU
89#define TCG_REG_GUEST_BASE TCG_REG_R11
90#endif
91
92typedef enum {
93 COND_EQ = 0x0,

--- 3112 unchanged lines hidden --- 		90#define TCG_REG_TMP TCG_REG_R12
91#define TCG_VEC_TMP TCG_REG_Q15
92#ifndef CONFIG_SOFTMMU
93#define TCG_REG_GUEST_BASE TCG_REG_R11
94#endif
95
96typedef enum {
97 COND_EQ = 0x0,

--- 3112 unchanged lines hidden ---