translate.c (d013d220c710054a6d755941460f88c186fef7b5) translate.c (14776ab5a12972ea439c7fb2203a4c15a09094b4)
1/*
2 * TriCore emulation for qemu: main translation routines.
3 *
4 * Copyright (c) 2013-2014 Bastian Koppelmann C-Lab/University Paderborn
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

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214 if (reg & 0x1) { \
215 generate_trap(ctx, TRAPC_INSN_ERR, TIN2_OPD); \
216 } \
217} while (0)
218
219/* Functions for load/save to/from memory */
220
221static inline void gen_offset_ld(DisasContext *ctx, TCGv r1, TCGv r2,
1/*
2 * TriCore emulation for qemu: main translation routines.
3 *
4 * Copyright (c) 2013-2014 Bastian Koppelmann C-Lab/University Paderborn
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

--- 205 unchanged lines hidden (view full) ---

214 if (reg & 0x1) { \
215 generate_trap(ctx, TRAPC_INSN_ERR, TIN2_OPD); \
216 } \
217} while (0)
218
219/* Functions for load/save to/from memory */
220
221static inline void gen_offset_ld(DisasContext *ctx, TCGv r1, TCGv r2,
222 int16_t con, TCGMemOp mop)
222 int16_t con, MemOp mop)
223{
224 TCGv temp = tcg_temp_new();
225 tcg_gen_addi_tl(temp, r2, con);
226 tcg_gen_qemu_ld_tl(r1, temp, ctx->mem_idx, mop);
227 tcg_temp_free(temp);
228}
229
230static inline void gen_offset_st(DisasContext *ctx, TCGv r1, TCGv r2,
223{
224 TCGv temp = tcg_temp_new();
225 tcg_gen_addi_tl(temp, r2, con);
226 tcg_gen_qemu_ld_tl(r1, temp, ctx->mem_idx, mop);
227 tcg_temp_free(temp);
228}
229
230static inline void gen_offset_st(DisasContext *ctx, TCGv r1, TCGv r2,
231 int16_t con, TCGMemOp mop)
231 int16_t con, MemOp mop)
232{
233 TCGv temp = tcg_temp_new();
234 tcg_gen_addi_tl(temp, r2, con);
235 tcg_gen_qemu_st_tl(r1, temp, ctx->mem_idx, mop);
236 tcg_temp_free(temp);
237}
238
239static void gen_st_2regs_64(TCGv rh, TCGv rl, TCGv address, DisasContext *ctx)

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271{
272 TCGv temp = tcg_temp_new();
273 tcg_gen_addi_tl(temp, base, con);
274 gen_ld_2regs_64(rh, rl, temp, ctx);
275 tcg_temp_free(temp);
276}
277
278static void gen_st_preincr(DisasContext *ctx, TCGv r1, TCGv r2, int16_t off,
232{
233 TCGv temp = tcg_temp_new();
234 tcg_gen_addi_tl(temp, r2, con);
235 tcg_gen_qemu_st_tl(r1, temp, ctx->mem_idx, mop);
236 tcg_temp_free(temp);
237}
238
239static void gen_st_2regs_64(TCGv rh, TCGv rl, TCGv address, DisasContext *ctx)

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271{
272 TCGv temp = tcg_temp_new();
273 tcg_gen_addi_tl(temp, base, con);
274 gen_ld_2regs_64(rh, rl, temp, ctx);
275 tcg_temp_free(temp);
276}
277
278static void gen_st_preincr(DisasContext *ctx, TCGv r1, TCGv r2, int16_t off,
279 TCGMemOp mop)
279 MemOp mop)
280{
281 TCGv temp = tcg_temp_new();
282 tcg_gen_addi_tl(temp, r2, off);
283 tcg_gen_qemu_st_tl(r1, temp, ctx->mem_idx, mop);
284 tcg_gen_mov_tl(r2, temp);
285 tcg_temp_free(temp);
286}
287
288static void gen_ld_preincr(DisasContext *ctx, TCGv r1, TCGv r2, int16_t off,
280{
281 TCGv temp = tcg_temp_new();
282 tcg_gen_addi_tl(temp, r2, off);
283 tcg_gen_qemu_st_tl(r1, temp, ctx->mem_idx, mop);
284 tcg_gen_mov_tl(r2, temp);
285 tcg_temp_free(temp);
286}
287
288static void gen_ld_preincr(DisasContext *ctx, TCGv r1, TCGv r2, int16_t off,
289 TCGMemOp mop)
289 MemOp mop)
290{
291 TCGv temp = tcg_temp_new();
292 tcg_gen_addi_tl(temp, r2, off);
293 tcg_gen_qemu_ld_tl(r1, temp, ctx->mem_idx, mop);
294 tcg_gen_mov_tl(r2, temp);
295 tcg_temp_free(temp);
296}
297

--- 8676 unchanged lines hidden --- 		290{
291 TCGv temp = tcg_temp_new();
292 tcg_gen_addi_tl(temp, r2, off);
293 tcg_gen_qemu_ld_tl(r1, temp, ctx->mem_idx, mop);
294 tcg_gen_mov_tl(r2, temp);
295 tcg_temp_free(temp);
296}
297

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