translate.c (c76c804509e75ab0307f878282bc73b7852d5360) translate.c (4a8d145d7177f42b7e7199175d1754fc55bc932f)
1/*
2 SPARC translation
3
4 Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
5 Copyright (C) 2003-2005 Fabrice Bellard
6
7 This library is free software; you can redistribute it and/or
8 modify it under the terms of the GNU Lesser General Public

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903{
904 TCGv t0 = tcg_temp_new();
905 gen_mov_reg_FCC0(dst, src, fcc_offset);
906 gen_mov_reg_FCC1(t0, src, fcc_offset);
907 tcg_gen_and_tl(dst, dst, t0);
908 tcg_gen_xori_tl(dst, dst, 0x1);
909}
910
1/*
2 SPARC translation
3
4 Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
5 Copyright (C) 2003-2005 Fabrice Bellard
6
7 This library is free software; you can redistribute it and/or
8 modify it under the terms of the GNU Lesser General Public

--- 894 unchanged lines hidden (view full) ---

903{
904 TCGv t0 = tcg_temp_new();
905 gen_mov_reg_FCC0(dst, src, fcc_offset);
906 gen_mov_reg_FCC1(t0, src, fcc_offset);
907 tcg_gen_and_tl(dst, dst, t0);
908 tcg_gen_xori_tl(dst, dst, 0x1);
909}
910
911static void gen_branch2(DisasContext *dc, target_ulong pc1,
912 target_ulong pc2, TCGv r_cond)
913{
914 TCGLabel *l1 = gen_new_label();
915
916 tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
917
918 gen_goto_tb(dc, 0, pc1, pc1 + 4);
919
920 gen_set_label(l1);
921 gen_goto_tb(dc, 1, pc2, pc2 + 4);
922}
923
924static void gen_generic_branch(DisasContext *dc)
925{
926 TCGv npc0 = tcg_constant_tl(dc->jump_pc[0]);
927 TCGv npc1 = tcg_constant_tl(dc->jump_pc[1]);
928 TCGv zero = tcg_constant_tl(0);
929
930 tcg_gen_movcond_tl(TCG_COND_NE, cpu_npc, cpu_cond, zero, npc0, npc1);
931}

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2347# define avail_HYPV(C) false
2348# define avail_VIS1(C) false
2349# define avail_VIS2(C) false
2350#endif
2351
2352/* Default case for non jump instructions. */
2353static bool advance_pc(DisasContext *dc)
2354{
911static void gen_generic_branch(DisasContext *dc)
912{
913 TCGv npc0 = tcg_constant_tl(dc->jump_pc[0]);
914 TCGv npc1 = tcg_constant_tl(dc->jump_pc[1]);
915 TCGv zero = tcg_constant_tl(0);
916
917 tcg_gen_movcond_tl(TCG_COND_NE, cpu_npc, cpu_cond, zero, npc0, npc1);
918}

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2334# define avail_HYPV(C) false
2335# define avail_VIS1(C) false
2336# define avail_VIS2(C) false
2337#endif
2338
2339/* Default case for non jump instructions. */
2340static bool advance_pc(DisasContext *dc)
2341{
2342 TCGLabel *l1;
2343
2355 if (dc->npc & 3) {
2356 switch (dc->npc) {
2357 case DYNAMIC_PC:
2358 case DYNAMIC_PC_LOOKUP:
2359 dc->pc = dc->npc;
2360 gen_op_next_insn();
2361 break;
2344 if (dc->npc & 3) {
2345 switch (dc->npc) {
2346 case DYNAMIC_PC:
2347 case DYNAMIC_PC_LOOKUP:
2348 dc->pc = dc->npc;
2349 gen_op_next_insn();
2350 break;
2351
2362 case JUMP_PC:
2363 /* we can do a static jump */
2352 case JUMP_PC:
2353 /* we can do a static jump */
2364 gen_branch2(dc, dc->jump_pc[0], dc->jump_pc[1], cpu_cond);
2354 l1 = gen_new_label();
2355 tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cond, 0, l1);
2356
2357 /* jump not taken */
2358 gen_goto_tb(dc, 1, dc->jump_pc[1], dc->jump_pc[1] + 4);
2359
2360 /* jump taken */
2361 gen_set_label(l1);
2362 gen_goto_tb(dc, 0, dc->jump_pc[0], dc->jump_pc[0] + 4);
2363
2365 dc->base.is_jmp = DISAS_NORETURN;
2366 break;
2364 dc->base.is_jmp = DISAS_NORETURN;
2365 break;
2366
2367 default:
2368 g_assert_not_reached();
2369 }
2370 } else {
2371 dc->pc = dc->npc;
2372 dc->npc = dc->npc + 4;
2373 }
2374 return true;

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2368 g_assert_not_reached();
2369 }
2370 } else {
2371 dc->pc = dc->npc;
2372 dc->npc = dc->npc + 4;
2373 }
2374 return true;

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