translate.c (76277cf82f0e1123bd69ec59d22014b8f78485ec) translate.c (5a165e2615736a60acce94fbd4e66eda5ba92268)
1/*
2 SPARC translation
3
4 Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
5 Copyright (C) 2003-2005 Fabrice Bellard
6
7 This library is free software; you can redistribute it and/or
8 modify it under the terms of the GNU Lesser General Public

--- 171 unchanged lines hidden (view full) ---

180 int mem_idx;
181 bool cpu_cond_live;
182 bool fpu_enabled;
183 bool address_mask_32bit;
184#ifndef CONFIG_USER_ONLY
185 bool supervisor;
186#ifdef TARGET_SPARC64
187 bool hypervisor;
1/*
2 SPARC translation
3
4 Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
5 Copyright (C) 2003-2005 Fabrice Bellard
6
7 This library is free software; you can redistribute it and/or
8 modify it under the terms of the GNU Lesser General Public

--- 171 unchanged lines hidden (view full) ---

180 int mem_idx;
181 bool cpu_cond_live;
182 bool fpu_enabled;
183 bool address_mask_32bit;
184#ifndef CONFIG_USER_ONLY
185 bool supervisor;
186#ifdef TARGET_SPARC64
187 bool hypervisor;
188#else
189 bool fsr_qne;
188#endif
189#endif
190
191 sparc_def_t *def;
192#ifdef TARGET_SPARC64
193 int fprs_dirty;
194 int asi;
195#endif

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5591 dc->pc = dc->base.pc_first;
5592 dc->npc = (target_ulong)dc->base.tb->cs_base;
5593 dc->mem_idx = dc->base.tb->flags & TB_FLAG_MMU_MASK;
5594 dc->def = &cpu_env(cs)->def;
5595 dc->fpu_enabled = tb_fpu_enabled(dc->base.tb->flags);
5596 dc->address_mask_32bit = tb_am_enabled(dc->base.tb->flags);
5597#ifndef CONFIG_USER_ONLY
5598 dc->supervisor = (dc->base.tb->flags & TB_FLAG_SUPER) != 0;
190#endif
191#endif
192
193 sparc_def_t *def;
194#ifdef TARGET_SPARC64
195 int fprs_dirty;
196 int asi;
197#endif

--- 5395 unchanged lines hidden (view full) ---

5593 dc->pc = dc->base.pc_first;
5594 dc->npc = (target_ulong)dc->base.tb->cs_base;
5595 dc->mem_idx = dc->base.tb->flags & TB_FLAG_MMU_MASK;
5596 dc->def = &cpu_env(cs)->def;
5597 dc->fpu_enabled = tb_fpu_enabled(dc->base.tb->flags);
5598 dc->address_mask_32bit = tb_am_enabled(dc->base.tb->flags);
5599#ifndef CONFIG_USER_ONLY
5600 dc->supervisor = (dc->base.tb->flags & TB_FLAG_SUPER) != 0;
5601# ifdef TARGET_SPARC64
5602 dc->hypervisor = (dc->base.tb->flags & TB_FLAG_HYPER) != 0;
5603# else
5604 dc->fsr_qne = (dc->base.tb->flags & TB_FLAG_FSR_QNE) != 0;
5605# endif
5599#endif
5600#ifdef TARGET_SPARC64
5601 dc->fprs_dirty = 0;
5602 dc->asi = (dc->base.tb->flags >> TB_FLAG_ASI_SHIFT) & 0xff;
5606#endif
5607#ifdef TARGET_SPARC64
5608 dc->fprs_dirty = 0;
5609 dc->asi = (dc->base.tb->flags >> TB_FLAG_ASI_SHIFT) & 0xff;
5603#ifndef CONFIG_USER_ONLY
5604 dc->hypervisor = (dc->base.tb->flags & TB_FLAG_HYPER) != 0;
5605#endif
5610#endif
5606#endif
5607 /*
5608 * if we reach a page boundary, we stop generation so that the
5609 * PC of a TT_TFAULT exception is always in the right page
5610 */
5611 bound = -(dc->base.pc_first | TARGET_PAGE_MASK) / 4;
5612 dc->base.max_insns = MIN(dc->base.max_insns, bound);
5613}
5614

--- 232 unchanged lines hidden --- 		5611 /*
5612 * if we reach a page boundary, we stop generation so that the
5613 * PC of a TT_TFAULT exception is always in the right page
5614 */
5615 bound = -(dc->base.pc_first | TARGET_PAGE_MASK) / 4;
5616 dc->base.max_insns = MIN(dc->base.max_insns, bound);
5617}
5618

--- 232 unchanged lines hidden ---