translate.c (2d9bb2371d97aedd3d07eb4bccca9586cf88cf69) translate.c (3951b7a87d7dfc6533e367562890b557bfb51bdc)
1/*
2 SPARC translation
3
4 Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
5 Copyright (C) 2003-2005 Fabrice Bellard
6
7 This library is free software; you can redistribute it and/or
8 modify it under the terms of the GNU Lesser General Public

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2374 return true;
2375}
2376
2377/*
2378 * Major opcodes 00 and 01 -- branches, call, and sethi
2379 */
2380
2381static bool advance_jump_cond(DisasContext *dc, DisasCompare *cmp,
1/*
2 SPARC translation
3
4 Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
5 Copyright (C) 2003-2005 Fabrice Bellard
6
7 This library is free software; you can redistribute it and/or
8 modify it under the terms of the GNU Lesser General Public

--- 2365 unchanged lines hidden (view full) ---

2374 return true;
2375}
2376
2377/*
2378 * Major opcodes 00 and 01 -- branches, call, and sethi
2379 */
2380
2381static bool advance_jump_cond(DisasContext *dc, DisasCompare *cmp,
2382 bool annul, target_ulong dest)
2382 bool annul, int disp)
2383{
2383{
2384 target_ulong dest = address_mask_i(dc, dc->pc + disp * 4);
2384 target_ulong npc;
2385
2386 if (cmp->cond == TCG_COND_ALWAYS) {
2387 if (annul) {
2388 dc->pc = dest;
2389 dc->npc = dest + 4;
2390 } else {
2391 gen_mov_pc_npc(dc);

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2470 if (dc->def->features & CPU_FEATURE_FLOAT128) {
2471 return false;
2472 }
2473 return raise_unimpfpop(dc);
2474}
2475
2476static bool do_bpcc(DisasContext *dc, arg_bcc *a)
2477{
2385 target_ulong npc;
2386
2387 if (cmp->cond == TCG_COND_ALWAYS) {
2388 if (annul) {
2389 dc->pc = dest;
2390 dc->npc = dest + 4;
2391 } else {
2392 gen_mov_pc_npc(dc);

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2471 if (dc->def->features & CPU_FEATURE_FLOAT128) {
2472 return false;
2473 }
2474 return raise_unimpfpop(dc);
2475}
2476
2477static bool do_bpcc(DisasContext *dc, arg_bcc *a)
2478{
2478 target_long target = address_mask_i(dc, dc->pc + a->i * 4);
2479 DisasCompare cmp;
2480
2481 gen_compare(&cmp, a->cc, a->cond, dc);
2479 DisasCompare cmp;
2480
2481 gen_compare(&cmp, a->cc, a->cond, dc);
2482 return advance_jump_cond(dc, &cmp, a->a, target);
2482 return advance_jump_cond(dc, &cmp, a->a, a->i);
2483}
2484
2485TRANS(Bicc, ALL, do_bpcc, a)
2486TRANS(BPcc, 64, do_bpcc, a)
2487
2488static bool do_fbpfcc(DisasContext *dc, arg_bcc *a)
2489{
2483}
2484
2485TRANS(Bicc, ALL, do_bpcc, a)
2486TRANS(BPcc, 64, do_bpcc, a)
2487
2488static bool do_fbpfcc(DisasContext *dc, arg_bcc *a)
2489{
2490 target_long target = address_mask_i(dc, dc->pc + a->i * 4);
2491 DisasCompare cmp;
2492
2493 if (gen_trap_ifnofpu(dc)) {
2494 return true;
2495 }
2496 gen_fcompare(&cmp, a->cc, a->cond);
2490 DisasCompare cmp;
2491
2492 if (gen_trap_ifnofpu(dc)) {
2493 return true;
2494 }
2495 gen_fcompare(&cmp, a->cc, a->cond);
2497 return advance_jump_cond(dc, &cmp, a->a, target);
2496 return advance_jump_cond(dc, &cmp, a->a, a->i);
2498}
2499
2500TRANS(FBPfcc, 64, do_fbpfcc, a)
2501TRANS(FBfcc, ALL, do_fbpfcc, a)
2502
2503static bool trans_BPr(DisasContext *dc, arg_BPr *a)
2504{
2497}
2498
2499TRANS(FBPfcc, 64, do_fbpfcc, a)
2500TRANS(FBfcc, ALL, do_fbpfcc, a)
2501
2502static bool trans_BPr(DisasContext *dc, arg_BPr *a)
2503{
2505 target_long target = address_mask_i(dc, dc->pc + a->i * 4);
2506 DisasCompare cmp;
2507
2508 if (!avail_64(dc)) {
2509 return false;
2510 }
2511 if (gen_tcg_cond_reg[a->cond] == TCG_COND_NEVER) {
2512 return false;
2513 }
2514
2515 gen_compare_reg(&cmp, a->cond, gen_load_gpr(dc, a->rs1));
2504 DisasCompare cmp;
2505
2506 if (!avail_64(dc)) {
2507 return false;
2508 }
2509 if (gen_tcg_cond_reg[a->cond] == TCG_COND_NEVER) {
2510 return false;
2511 }
2512
2513 gen_compare_reg(&cmp, a->cond, gen_load_gpr(dc, a->rs1));
2516 return advance_jump_cond(dc, &cmp, a->a, target);
2514 return advance_jump_cond(dc, &cmp, a->a, a->i);
2517}
2518
2519static bool trans_CALL(DisasContext *dc, arg_CALL *a)
2520{
2521 target_long target = address_mask_i(dc, dc->pc + a->i * 4);
2522
2523 gen_store_gpr(dc, 15, tcg_constant_tl(dc->pc));
2524 gen_mov_pc_npc(dc);

--- 2749 unchanged lines hidden --- 		2515}
2516
2517static bool trans_CALL(DisasContext *dc, arg_CALL *a)
2518{
2519 target_long target = address_mask_i(dc, dc->pc + a->i * 4);
2520
2521 gen_store_gpr(dc, 15, tcg_constant_tl(dc->pc));
2522 gen_mov_pc_npc(dc);

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