insns.decode (f7ec8155f5714df29af2596b2468dd597c137256) | insns.decode (40f9ad219bb991b50318836612b7331f35c7bb3b) |
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1# SPDX-License-Identifier: LGPL-2.0+ 2# 3# Sparc instruction decode definitions. 4# Copyright (c) 2023 Richard Henderson <rth@twiddle.net> 5 6## 7## Major Opcodes 00 and 01 -- branches, call, and sethi. 8## --- 282 unchanged lines hidden (view full) --- 291FMOVsfcc 10 rd:5 110101 0 cond:4 0 cc:2 000001 rs2:5 292FMOVdfcc 10 rd:5 110101 0 cond:4 0 cc:2 000010 rs2:5 293FMOVqfcc 10 rd:5 110101 0 cond:4 0 cc:2 000011 rs2:5 294 295FMOVRs 10 rd:5 110101 rs1:5 0 cond:3 00101 rs2:5 296FMOVRd 10 rd:5 110101 rs1:5 0 cond:3 00110 rs2:5 297FMOVRq 10 rd:5 110101 rs1:5 0 cond:3 00111 rs2:5 298 | 1# SPDX-License-Identifier: LGPL-2.0+ 2# 3# Sparc instruction decode definitions. 4# Copyright (c) 2023 Richard Henderson <rth@twiddle.net> 5 6## 7## Major Opcodes 00 and 01 -- branches, call, and sethi. 8## --- 282 unchanged lines hidden (view full) --- 291FMOVsfcc 10 rd:5 110101 0 cond:4 0 cc:2 000001 rs2:5 292FMOVdfcc 10 rd:5 110101 0 cond:4 0 cc:2 000010 rs2:5 293FMOVqfcc 10 rd:5 110101 0 cond:4 0 cc:2 000011 rs2:5 294 295FMOVRs 10 rd:5 110101 rs1:5 0 cond:3 00101 rs2:5 296FMOVRd 10 rd:5 110101 rs1:5 0 cond:3 00110 rs2:5 297FMOVRq 10 rd:5 110101 rs1:5 0 cond:3 00111 rs2:5 298 |
299FCMPs 10 000 cc:2 110101 rs1:5 0 0101 0001 rs2:5 300FCMPd 10 000 cc:2 110101 rs1:5 0 0101 0010 rs2:5 301FCMPq 10 000 cc:2 110101 rs1:5 0 0101 0011 rs2:5 302FCMPEs 10 000 cc:2 110101 rs1:5 0 0101 0101 rs2:5 303FCMPEd 10 000 cc:2 110101 rs1:5 0 0101 0110 rs2:5 304FCMPEq 10 000 cc:2 110101 rs1:5 0 0101 0111 rs2:5 305 |
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299{ 300 [ 301 EDGE8cc 10 ..... 110110 ..... 0 0000 0000 ..... @r_r_r 302 EDGE8N 10 ..... 110110 ..... 0 0000 0001 ..... @r_r_r 303 EDGE8Lcc 10 ..... 110110 ..... 0 0000 0010 ..... @r_r_r 304 EDGE8LN 10 ..... 110110 ..... 0 0000 0011 ..... @r_r_r 305 EDGE16cc 10 ..... 110110 ..... 0 0000 0100 ..... @r_r_r 306 EDGE16N 10 ..... 110110 ..... 0 0000 0101 ..... @r_r_r --- 218 unchanged lines hidden --- | 306{ 307 [ 308 EDGE8cc 10 ..... 110110 ..... 0 0000 0000 ..... @r_r_r 309 EDGE8N 10 ..... 110110 ..... 0 0000 0001 ..... @r_r_r 310 EDGE8Lcc 10 ..... 110110 ..... 0 0000 0010 ..... @r_r_r 311 EDGE8LN 10 ..... 110110 ..... 0 0000 0011 ..... @r_r_r 312 EDGE16cc 10 ..... 110110 ..... 0 0000 0100 ..... @r_r_r 313 EDGE16N 10 ..... 110110 ..... 0 0000 0101 ..... @r_r_r --- 218 unchanged lines hidden --- |