| cpu.h (3fd0e85f3f3db70e6b6a70bdacc90bbea0e396de) | cpu.h (3a06f981925bfade8f5e650655fce0b38dbd6649) |
|---|---|
| 1/* 2 * S/390 virtual CPU header 3 * 4 * For details on the s390x architecture and used definitions (e.g., 5 * PSW, PER and DAT (Dynamic Address Translation)), please refer to 6 * the "z/Architecture Principles of Operations" - a.k.a. PoP. 7 * 8 * Copyright (c) 2009 Ulrich Hecht --- 301 unchanged lines hidden (view full) --- 310#define FLAG_MASK_VECTOR (PSW_MASK_UNUSED_3 >> FLAG_MASK_PSW_SHIFT) 311 312/* Control register 0 bits */ 313#define CR0_LOWPROT 0x0000000010000000ULL 314#define CR0_SECONDARY 0x0000000004000000ULL 315#define CR0_EDAT 0x0000000000800000ULL 316#define CR0_AFP 0x0000000000040000ULL 317#define CR0_VECTOR 0x0000000000020000ULL | 1/* 2 * S/390 virtual CPU header 3 * 4 * For details on the s390x architecture and used definitions (e.g., 5 * PSW, PER and DAT (Dynamic Address Translation)), please refer to 6 * the "z/Architecture Principles of Operations" - a.k.a. PoP. 7 * 8 * Copyright (c) 2009 Ulrich Hecht --- 301 unchanged lines hidden (view full) --- 310#define FLAG_MASK_VECTOR (PSW_MASK_UNUSED_3 >> FLAG_MASK_PSW_SHIFT) 311 312/* Control register 0 bits */ 313#define CR0_LOWPROT 0x0000000010000000ULL 314#define CR0_SECONDARY 0x0000000004000000ULL 315#define CR0_EDAT 0x0000000000800000ULL 316#define CR0_AFP 0x0000000000040000ULL 317#define CR0_VECTOR 0x0000000000020000ULL |
| 318#define CR0_IEP 0x0000000000100000ULL |
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| 318#define CR0_EMERGENCY_SIGNAL_SC 0x0000000000004000ULL 319#define CR0_EXTERNAL_CALL_SC 0x0000000000002000ULL 320#define CR0_CKC_SC 0x0000000000000800ULL 321#define CR0_CPU_TIMER_SC 0x0000000000000400ULL 322#define CR0_SERVICE_SC 0x0000000000000200ULL 323 324/* Control register 14 bits */ 325#define CR14_CHANNEL_REPORT_SC 0x0000000010000000ULL --- 516 unchanged lines hidden --- | 319#define CR0_EMERGENCY_SIGNAL_SC 0x0000000000004000ULL 320#define CR0_EXTERNAL_CALL_SC 0x0000000000002000ULL 321#define CR0_CKC_SC 0x0000000000000800ULL 322#define CR0_CPU_TIMER_SC 0x0000000000000400ULL 323#define CR0_SERVICE_SC 0x0000000000000200ULL 324 325/* Control register 14 bits */ 326#define CR14_CHANNEL_REPORT_SC 0x0000000010000000ULL --- 516 unchanged lines hidden --- |