| cpu.h (3e7e5e0bc10d32d7cc41d0a39113473a3abfc657) | cpu.h (159fed45db25c0c82f3833509502c8242a65c097) |
|---|---|
| 1/* 2 * S/390 virtual CPU header 3 * 4 * Copyright (c) 2009 Ulrich Hecht 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either --- 332 unchanged lines hidden (view full) --- 341/* the address space values shifted */ 342#define AS_PRIMARY 0 343#define AS_ACCREG 1 344#define AS_SECONDARY 2 345#define AS_HOME 3 346 347/* tb flags */ 348 | 1/* 2 * S/390 virtual CPU header 3 * 4 * Copyright (c) 2009 Ulrich Hecht 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either --- 332 unchanged lines hidden (view full) --- 341/* the address space values shifted */ 342#define AS_PRIMARY 0 343#define AS_ACCREG 1 344#define AS_SECONDARY 2 345#define AS_HOME 3 346 347/* tb flags */ 348 |
| 349#define FLAG_MASK_PER (PSW_MASK_PER >> 32) 350#define FLAG_MASK_DAT (PSW_MASK_DAT >> 32) 351#define FLAG_MASK_IO (PSW_MASK_IO >> 32) 352#define FLAG_MASK_EXT (PSW_MASK_EXT >> 32) 353#define FLAG_MASK_KEY (PSW_MASK_KEY >> 32) 354#define FLAG_MASK_MCHECK (PSW_MASK_MCHECK >> 32) 355#define FLAG_MASK_WAIT (PSW_MASK_WAIT >> 32) 356#define FLAG_MASK_PSTATE (PSW_MASK_PSTATE >> 32) 357#define FLAG_MASK_ASC (PSW_MASK_ASC >> 32) 358#define FLAG_MASK_CC (PSW_MASK_CC >> 32) 359#define FLAG_MASK_PM (PSW_MASK_PM >> 32) 360#define FLAG_MASK_64 (PSW_MASK_64 >> 32) 361#define FLAG_MASK_32 0x00001000 | 349#define FLAG_MASK_PSW_SHIFT 31 350#define FLAG_MASK_PER (PSW_MASK_PER >> FLAG_MASK_PSW_SHIFT) 351#define FLAG_MASK_PSTATE (PSW_MASK_PSTATE >> FLAG_MASK_PSW_SHIFT) 352#define FLAG_MASK_ASC (PSW_MASK_ASC >> FLAG_MASK_PSW_SHIFT) 353#define FLAG_MASK_64 (PSW_MASK_64 >> FLAG_MASK_PSW_SHIFT) 354#define FLAG_MASK_32 (PSW_MASK_32 >> FLAG_MASK_PSW_SHIFT) 355#define FLAG_MASK_PSW (FLAG_MASK_PER | FLAG_MASK_PSTATE \ 356 | FLAG_MASK_ASC | FLAG_MASK_64 | FLAG_MASK_32) |
| 362 363/* Control register 0 bits */ 364#define CR0_LOWPROT 0x0000000010000000ULL 365#define CR0_SECONDARY 0x0000000004000000ULL 366#define CR0_EDAT 0x0000000000800000ULL 367 368/* MMU */ 369#define MMU_PRIMARY_IDX 0 --- 41 unchanged lines hidden (view full) --- 411 } 412} 413 414static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc, 415 target_ulong *cs_base, uint32_t *flags) 416{ 417 *pc = env->psw.addr; 418 *cs_base = env->ex_value; | 357 358/* Control register 0 bits */ 359#define CR0_LOWPROT 0x0000000010000000ULL 360#define CR0_SECONDARY 0x0000000004000000ULL 361#define CR0_EDAT 0x0000000000800000ULL 362 363/* MMU */ 364#define MMU_PRIMARY_IDX 0 --- 41 unchanged lines hidden (view full) --- 406 } 407} 408 409static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc, 410 target_ulong *cs_base, uint32_t *flags) 411{ 412 *pc = env->psw.addr; 413 *cs_base = env->ex_value; |
| 419 *flags = ((env->psw.mask >> 32) & ~FLAG_MASK_CC) | 420 ((env->psw.mask & PSW_MASK_32) ? FLAG_MASK_32 : 0); | 414 *flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; |
| 421} 422 423#define MAX_ILEN 6 424 425/* While the PoO talks about ILC (a number between 1-3) what is actually 426 stored in LowCore is shifted left one bit (an even between 2-6). As 427 this is the actual length of the insn and therefore more useful, that 428 is what we want to pass around and manipulate. To make sure that we --- 909 unchanged lines hidden --- | 415} 416 417#define MAX_ILEN 6 418 419/* While the PoO talks about ILC (a number between 1-3) what is actually 420 stored in LowCore is shifted left one bit (an even between 2-6). As 421 this is the actual length of the insn and therefore more useful, that 422 is what we want to pass around and manipulate. To make sure that we --- 909 unchanged lines hidden --- |