| csr.c (a42bd0016654cafd6ca8ca4dbb82fc921ca19ae4) | csr.c (31b9798d824512b7daf868cc8581f9a97a9d13a8) |
|---|---|
| 1/* 2 * RISC-V Control and Status Registers. 3 * 4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu 5 * Copyright (c) 2017-2018 SiFive, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, --- 3080 unchanged lines hidden (view full) --- 3089 if (!tdata_available(env, csrno - CSR_TDATA1)) { 3090 return RISCV_EXCP_ILLEGAL_INST; 3091 } 3092 3093 tdata_csr_write(env, csrno - CSR_TDATA1, val); 3094 return RISCV_EXCP_NONE; 3095} 3096 | 1/* 2 * RISC-V Control and Status Registers. 3 * 4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu 5 * Copyright (c) 2017-2018 SiFive, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, --- 3080 unchanged lines hidden (view full) --- 3089 if (!tdata_available(env, csrno - CSR_TDATA1)) { 3090 return RISCV_EXCP_ILLEGAL_INST; 3091 } 3092 3093 tdata_csr_write(env, csrno - CSR_TDATA1, val); 3094 return RISCV_EXCP_NONE; 3095} 3096 |
| 3097static RISCVException read_tinfo(CPURISCVState *env, int csrno, 3098 target_ulong *val) 3099{ 3100 *val = tinfo_csr_read(env); 3101 return RISCV_EXCP_NONE; 3102} 3103 |
|
| 3097/* 3098 * Functions to access Pointer Masking feature registers 3099 * We have to check if current priv lvl could modify 3100 * csr in given mode 3101 */ 3102static bool check_pm_current_disabled(CPURISCVState *env, int csrno) 3103{ 3104 int csr_priv = get_field(csrno, 0x300); --- 788 unchanged lines hidden (view full) --- 3893 [CSR_PMPADDR14] = { "pmpaddr14", pmp, read_pmpaddr, write_pmpaddr }, 3894 [CSR_PMPADDR15] = { "pmpaddr15", pmp, read_pmpaddr, write_pmpaddr }, 3895 3896 /* Debug CSRs */ 3897 [CSR_TSELECT] = { "tselect", debug, read_tselect, write_tselect }, 3898 [CSR_TDATA1] = { "tdata1", debug, read_tdata, write_tdata }, 3899 [CSR_TDATA2] = { "tdata2", debug, read_tdata, write_tdata }, 3900 [CSR_TDATA3] = { "tdata3", debug, read_tdata, write_tdata }, | 3104/* 3105 * Functions to access Pointer Masking feature registers 3106 * We have to check if current priv lvl could modify 3107 * csr in given mode 3108 */ 3109static bool check_pm_current_disabled(CPURISCVState *env, int csrno) 3110{ 3111 int csr_priv = get_field(csrno, 0x300); --- 788 unchanged lines hidden (view full) --- 3900 [CSR_PMPADDR14] = { "pmpaddr14", pmp, read_pmpaddr, write_pmpaddr }, 3901 [CSR_PMPADDR15] = { "pmpaddr15", pmp, read_pmpaddr, write_pmpaddr }, 3902 3903 /* Debug CSRs */ 3904 [CSR_TSELECT] = { "tselect", debug, read_tselect, write_tselect }, 3905 [CSR_TDATA1] = { "tdata1", debug, read_tdata, write_tdata }, 3906 [CSR_TDATA2] = { "tdata2", debug, read_tdata, write_tdata }, 3907 [CSR_TDATA3] = { "tdata3", debug, read_tdata, write_tdata }, |
| 3908 [CSR_TINFO] = { "tinfo", debug, read_tinfo, write_ignore }, |
|
| 3901 3902 /* User Pointer Masking */ 3903 [CSR_UMTE] = { "umte", pointer_masking, read_umte, write_umte }, 3904 [CSR_UPMMASK] = { "upmmask", pointer_masking, read_upmmask, 3905 write_upmmask }, 3906 [CSR_UPMBASE] = { "upmbase", pointer_masking, read_upmbase, 3907 write_upmbase }, 3908 /* Machine Pointer Masking */ --- 346 unchanged lines hidden --- | 3909 3910 /* User Pointer Masking */ 3911 [CSR_UMTE] = { "umte", pointer_masking, read_umte, write_umte }, 3912 [CSR_UPMMASK] = { "upmmask", pointer_masking, read_upmmask, 3913 write_upmmask }, 3914 [CSR_UPMBASE] = { "upmbase", pointer_masking, read_upmbase, 3915 write_upmbase }, 3916 /* Machine Pointer Masking */ --- 346 unchanged lines hidden --- |