cpu_helper.c (873f9ca3857cfeeef45441b116c91156736d529c) | cpu_helper.c (0099f6053410f5611796213b723e908cfc8055eb) |
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1/* 2 * RISC-V CPU helpers for qemu. 3 * 4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu 5 * Copyright (c) 2017-2018 SiFive, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, --- 1704 unchanged lines hidden (view full) --- 1713 tinst = (riscv_cpu_xlen(env) == 32) ? 0x00002000 : 0x00003000; 1714 } 1715 break; 1716 case RISCV_EXCP_ILLEGAL_INST: 1717 case RISCV_EXCP_VIRT_INSTRUCTION_FAULT: 1718 tval = env->bins; 1719 break; 1720 case RISCV_EXCP_BREAKPOINT: | 1/* 2 * RISC-V CPU helpers for qemu. 3 * 4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu 5 * Copyright (c) 2017-2018 SiFive, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, --- 1704 unchanged lines hidden (view full) --- 1713 tinst = (riscv_cpu_xlen(env) == 32) ? 0x00002000 : 0x00003000; 1714 } 1715 break; 1716 case RISCV_EXCP_ILLEGAL_INST: 1717 case RISCV_EXCP_VIRT_INSTRUCTION_FAULT: 1718 tval = env->bins; 1719 break; 1720 case RISCV_EXCP_BREAKPOINT: |
1721 tval = env->badaddr; |
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1721 if (cs->watchpoint_hit) { 1722 tval = cs->watchpoint_hit->hitaddr; 1723 cs->watchpoint_hit = NULL; 1724 } 1725 break; 1726 default: 1727 break; 1728 } --- 119 unchanged lines hidden --- | 1722 if (cs->watchpoint_hit) { 1723 tval = cs->watchpoint_hit->hitaddr; 1724 cs->watchpoint_hit = NULL; 1725 } 1726 break; 1727 default: 1728 break; 1729 } --- 119 unchanged lines hidden --- |