mmu-radix64.h (1b4d1cb31a886418635e288f89b2da24fd091c55) mmu-radix64.h (51806b545834e0902dd2d17d1f66c7a2d83422f3)
1#ifndef MMU_RADIX64_H
2#define MMU_RADIX64_H
3
4#ifndef CONFIG_USER_ONLY
5
6/* Radix Quadrants */
7#define R_EADDR_MASK 0x3FFFFFFFFFFFFFFF
8#define R_EADDR_QUADRANT 0xC000000000000000

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39#define R_PTE_EAA_R 0x0000000000000004
40#define R_PTE_EAA_RW 0x0000000000000002
41#define R_PTE_EAA_X 0x0000000000000001
42#define R_PDE_NLB PRTBE_R_RPDB
43#define R_PDE_NLS PRTBE_R_RPDS
44
45#ifdef TARGET_PPC64
46
1#ifndef MMU_RADIX64_H
2#define MMU_RADIX64_H
3
4#ifndef CONFIG_USER_ONLY
5
6/* Radix Quadrants */
7#define R_EADDR_MASK 0x3FFFFFFFFFFFFFFF
8#define R_EADDR_QUADRANT 0xC000000000000000

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39#define R_PTE_EAA_R 0x0000000000000004
40#define R_PTE_EAA_RW 0x0000000000000002
41#define R_PTE_EAA_X 0x0000000000000001
42#define R_PDE_NLB PRTBE_R_RPDB
43#define R_PDE_NLS PRTBE_R_RPDS
44
45#ifdef TARGET_PPC64
46
47int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
48 MMUAccessType access_type, int mmu_idx);
49hwaddr ppc_radix64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr);
47bool ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
48 hwaddr *raddr, int *psizep, int *protp,
49 bool guest_visible);
50
51static inline int ppc_radix64_get_prot_eaa(uint64_t pte)
52{
53 return (pte & R_PTE_EAA_R ? PAGE_READ : 0) |
54 (pte & R_PTE_EAA_RW ? PAGE_READ | PAGE_WRITE : 0) |
55 (pte & R_PTE_EAA_X ? PAGE_EXEC : 0);
56}
57

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50
51static inline int ppc_radix64_get_prot_eaa(uint64_t pte)
52{
53 return (pte & R_PTE_EAA_R ? PAGE_READ : 0) |
54 (pte & R_PTE_EAA_RW ? PAGE_READ | PAGE_WRITE : 0) |
55 (pte & R_PTE_EAA_X ? PAGE_EXEC : 0);
56}
57

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