mmu-hash32.c (6c3c873c63830eb89a5776486af0f32858f62938) mmu-hash32.c (51806b545834e0902dd2d17d1f66c7a2d83422f3)
1/*
2 * PowerPC MMU, TLB and BAT emulation helpers for QEMU.
3 *
4 * Copyright (c) 2003-2007 Jocelyn Mayer
5 * Copyright (c) 2013 David Gibson, IBM Corporation
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public

--- 410 unchanged lines hidden (view full) ---

419 target_ulong eaddr)
420{
421 hwaddr rpn = pte.pte1 & HPTE32_R_RPN;
422 hwaddr mask = ~TARGET_PAGE_MASK;
423
424 return (rpn & ~mask) | (eaddr & mask);
425}
426
1/*
2 * PowerPC MMU, TLB and BAT emulation helpers for QEMU.
3 *
4 * Copyright (c) 2003-2007 Jocelyn Mayer
5 * Copyright (c) 2013 David Gibson, IBM Corporation
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public

--- 410 unchanged lines hidden (view full) ---

419 target_ulong eaddr)
420{
421 hwaddr rpn = pte.pte1 & HPTE32_R_RPN;
422 hwaddr mask = ~TARGET_PAGE_MASK;
423
424 return (rpn & ~mask) | (eaddr & mask);
425}
426
427static bool ppc_hash32_xlate(PowerPCCPU *cpu, vaddr eaddr,
428 MMUAccessType access_type,
429 hwaddr *raddrp, int *psizep, int *protp,
430 bool guest_visible)
427bool ppc_hash32_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
428 hwaddr *raddrp, int *psizep, int *protp,
429 bool guest_visible)
431{
432 CPUState *cs = CPU(cpu);
433 CPUPPCState *env = &cpu->env;
434 target_ulong sr;
435 hwaddr pte_offset;
436 ppc_hash_pte32_t pte;
437 int prot;
438 int need_prot;

--- 125 unchanged lines hidden (view full) ---

564 }
565
566 /* 9. Determine the real address from the PTE */
567
568 *raddrp = ppc_hash32_pte_raddr(sr, pte, eaddr);
569 *protp = prot;
570 return true;
571}
430{
431 CPUState *cs = CPU(cpu);
432 CPUPPCState *env = &cpu->env;
433 target_ulong sr;
434 hwaddr pte_offset;
435 ppc_hash_pte32_t pte;
436 int prot;
437 int need_prot;

--- 125 unchanged lines hidden (view full) ---

563 }
564
565 /* 9. Determine the real address from the PTE */
566
567 *raddrp = ppc_hash32_pte_raddr(sr, pte, eaddr);
568 *protp = prot;
569 return true;
570}
572
573int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
574 MMUAccessType access_type, int mmu_idx)
575{
576 CPUState *cs = CPU(cpu);
577 int page_size, prot;
578 hwaddr raddr;
579
580 /* Translate eaddr to raddr (where raddr is addr qemu needs for access) */
581 if (!ppc_hash32_xlate(cpu, eaddr, access_type, &raddr,
582 &page_size, &prot, true)) {
583 return 1;
584 }
585
586 tlb_set_page(cs, eaddr & TARGET_PAGE_MASK, raddr & TARGET_PAGE_MASK,
587 prot, mmu_idx, 1UL << page_size);
588 return 0;
589}
590
591hwaddr ppc_hash32_get_phys_page_debug(PowerPCCPU *cpu, target_ulong eaddr)
592{
593 int psize, prot;
594 hwaddr raddr;
595
596 if (!ppc_hash32_xlate(cpu, eaddr, MMU_DATA_LOAD, &raddr,
597 &psize, &prot, false)) {
598 return -1;
599 }
600
601 return raddr & TARGET_PAGE_MASK;
602}