misc_helper.c (4d2b0ad32a593ac24757b66f64efe2fb84161345) misc_helper.c (2736432ffc30b74fc72858854e62b62253b685ff)
1/*
2 * Miscellaneous PowerPC emulation helpers for QEMU.
3 *
4 * Copyright (c) 2003-2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

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302 THREAD_SIBLING_FOREACH(cs, ccs) {
303 PowerPCCPU *ccpu = POWERPC_CPU(ccs);
304 uint32_t thread_id = ppc_cpu_tir(ccpu);
305
306 ppc_set_irq(cpu, PPC_INTERRUPT_DOORBELL, val & (0x1 << thread_id));
307 }
308 bql_unlock();
309}
1/*
2 * Miscellaneous PowerPC emulation helpers for QEMU.
3 *
4 * Copyright (c) 2003-2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

--- 293 unchanged lines hidden (view full) ---

302 THREAD_SIBLING_FOREACH(cs, ccs) {
303 PowerPCCPU *ccpu = POWERPC_CPU(ccs);
304 uint32_t thread_id = ppc_cpu_tir(ccpu);
305
306 ppc_set_irq(cpu, PPC_INTERRUPT_DOORBELL, val & (0x1 << thread_id));
307 }
308 bql_unlock();
309}
310
311/* Indirect SCOM (SPRC/SPRD) access to SCRATCH0-7 are implemented. */
312void helper_store_sprc(CPUPPCState *env, target_ulong val)
313{
314 if (val & ~0x3f8ULL) {
315 qemu_log_mask(LOG_GUEST_ERROR, "Invalid SPRC register value "
316 TARGET_FMT_lx"\n", val);
317 return;
318 }
319 env->spr[SPR_POWER_SPRC] = val;
320}
321
322target_ulong helper_load_sprd(CPUPPCState *env)
323{
324 target_ulong sprc = env->spr[SPR_POWER_SPRC];
325
326 switch (sprc & 0x3c0) {
327 case 0: /* SCRATCH0-7 */
328 return env->scratch[(sprc >> 3) & 0x7];
329 default:
330 qemu_log_mask(LOG_UNIMP, "mfSPRD: Unimplemented SPRC:0x"
331 TARGET_FMT_lx"\n", sprc);
332 break;
333 }
334 return 0;
335}
336
337static void do_store_scratch(CPUPPCState *env, int nr, target_ulong val)
338{
339 CPUState *cs = env_cpu(env);
340 CPUState *ccs;
341 uint32_t nr_threads = cs->nr_threads;
342
343 /*
344 * Log stores to SCRATCH, because some firmware uses these for debugging
345 * and logging, but they would normally be read by the BMC, which is
346 * not implemented in QEMU yet. This gives a way to get at the information.
347 * Could also dump these upon checkstop.
348 */
349 qemu_log("SPRD write 0x" TARGET_FMT_lx " to SCRATCH%d\n", val, nr);
350
351 if (nr_threads == 1) {
352 env->scratch[nr] = val;
353 return;
354 }
355
356 THREAD_SIBLING_FOREACH(cs, ccs) {
357 CPUPPCState *cenv = &POWERPC_CPU(ccs)->env;
358 cenv->scratch[nr] = val;
359 }
360}
361
362void helper_store_sprd(CPUPPCState *env, target_ulong val)
363{
364 target_ulong sprc = env->spr[SPR_POWER_SPRC];
365
366 switch (sprc & 0x3c0) {
367 case 0: /* SCRATCH0-7 */
368 do_store_scratch(env, (sprc >> 3) & 0x7, val);
369 break;
370 default:
371 qemu_log_mask(LOG_UNIMP, "mfSPRD: Unimplemented SPRC:0x"
372 TARGET_FMT_lx"\n", sprc);
373 break;
374 }
375}
310#endif /* defined(TARGET_PPC64) */
311
312void helper_store_pidr(CPUPPCState *env, target_ulong val)
313{
314 env->spr[SPR_BOOKS_PID] = (uint32_t)val;
315 tlb_flush(env_cpu(env));
316}
317

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376#endif /* defined(TARGET_PPC64) */
377
378void helper_store_pidr(CPUPPCState *env, target_ulong val)
379{
380 env->spr[SPR_BOOKS_PID] = (uint32_t)val;
381 tlb_flush(env_cpu(env));
382}
383

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