translate.c (cb0a0a4c8686792068860f339eddd695e1a485a1) translate.c (97955ceb422421f48cbbab44cbe9a0998adde2cb)
1/*
2 * Xilinx MicroBlaze emulation for qemu: main translation routines.
3 *
4 * Copyright (c) 2009 Edgar E. Iglesias.
5 * Copyright (c) 2009-2012 PetaLogix Qld Pty Ltd.
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public

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282#define DO_TYPEA_CFG(NAME, CFG, SE, FN) \
283 static bool trans_##NAME(DisasContext *dc, arg_typea *a) \
284 { return dc->cpu->cfg.CFG && do_typea(dc, a, SE, FN); }
285
286#define DO_TYPEBI(NAME, SE, FNI) \
287 static bool trans_##NAME(DisasContext *dc, arg_typeb *a) \
288 { return do_typeb_imm(dc, a, SE, FNI); }
289
1/*
2 * Xilinx MicroBlaze emulation for qemu: main translation routines.
3 *
4 * Copyright (c) 2009 Edgar E. Iglesias.
5 * Copyright (c) 2009-2012 PetaLogix Qld Pty Ltd.
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public

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282#define DO_TYPEA_CFG(NAME, CFG, SE, FN) \
283 static bool trans_##NAME(DisasContext *dc, arg_typea *a) \
284 { return dc->cpu->cfg.CFG && do_typea(dc, a, SE, FN); }
285
286#define DO_TYPEBI(NAME, SE, FNI) \
287 static bool trans_##NAME(DisasContext *dc, arg_typeb *a) \
288 { return do_typeb_imm(dc, a, SE, FNI); }
289
290#define DO_TYPEBI_CFG(NAME, CFG, SE, FNI) \
291 static bool trans_##NAME(DisasContext *dc, arg_typeb *a) \
292 { return dc->cpu->cfg.CFG && do_typeb_imm(dc, a, SE, FNI); }
293
290#define DO_TYPEBV(NAME, SE, FN) \
291 static bool trans_##NAME(DisasContext *dc, arg_typeb *a) \
292 { return do_typeb_val(dc, a, SE, FN); }
293
294/* No input carry, but output carry. */
295static void gen_add(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
296{
297 TCGv_i32 zero = tcg_const_i32(0);

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359 tcg_gen_sub_i32(out, inb, ina);
360 tcg_gen_deposit_i32(out, out, lt, 31, 1);
361 tcg_temp_free_i32(lt);
362}
363
364DO_TYPEA(cmp, false, gen_cmp)
365DO_TYPEA(cmpu, false, gen_cmpu)
366
294#define DO_TYPEBV(NAME, SE, FN) \
295 static bool trans_##NAME(DisasContext *dc, arg_typeb *a) \
296 { return do_typeb_val(dc, a, SE, FN); }
297
298/* No input carry, but output carry. */
299static void gen_add(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
300{
301 TCGv_i32 zero = tcg_const_i32(0);

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363 tcg_gen_sub_i32(out, inb, ina);
364 tcg_gen_deposit_i32(out, out, lt, 31, 1);
365 tcg_temp_free_i32(lt);
366}
367
368DO_TYPEA(cmp, false, gen_cmp)
369DO_TYPEA(cmpu, false, gen_cmpu)
370
371static void gen_mulh(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
372{
373 TCGv_i32 tmp = tcg_temp_new_i32();
374 tcg_gen_muls2_i32(tmp, out, ina, inb);
375 tcg_temp_free_i32(tmp);
376}
377
378static void gen_mulhu(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
379{
380 TCGv_i32 tmp = tcg_temp_new_i32();
381 tcg_gen_mulu2_i32(tmp, out, ina, inb);
382 tcg_temp_free_i32(tmp);
383}
384
385static void gen_mulhsu(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
386{
387 TCGv_i32 tmp = tcg_temp_new_i32();
388 tcg_gen_mulsu2_i32(tmp, out, ina, inb);
389 tcg_temp_free_i32(tmp);
390}
391
392DO_TYPEA_CFG(mul, use_hw_mul, false, tcg_gen_mul_i32)
393DO_TYPEA_CFG(mulh, use_hw_mul >= 2, false, gen_mulh)
394DO_TYPEA_CFG(mulhu, use_hw_mul >= 2, false, gen_mulhu)
395DO_TYPEA_CFG(mulhsu, use_hw_mul >= 2, false, gen_mulhsu)
396DO_TYPEBI_CFG(muli, use_hw_mul, false, tcg_gen_muli_i32)
397
367DO_TYPEA(or, false, tcg_gen_or_i32)
368DO_TYPEBI(ori, false, tcg_gen_ori_i32)
369
370static void gen_pcmpeq(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
371{
372 tcg_gen_setcond_i32(TCG_COND_EQ, out, ina, inb);
373}
374

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647 }
648 }
649
650 if (dc->rd == 0) {
651 tcg_gen_movi_i32(cpu_R[0], 0);
652 }
653}
654
398DO_TYPEA(or, false, tcg_gen_or_i32)
399DO_TYPEBI(ori, false, tcg_gen_ori_i32)
400
401static void gen_pcmpeq(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
402{
403 tcg_gen_setcond_i32(TCG_COND_EQ, out, ina, inb);
404}
405

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678 }
679 }
680
681 if (dc->rd == 0) {
682 tcg_gen_movi_i32(cpu_R[0], 0);
683 }
684}
685
655/* Multiplier unit. */
656static void dec_mul(DisasContext *dc)
657{
658 TCGv_i32 tmp;
659 unsigned int subcode;
660
661 if (trap_illegal(dc, !dc->cpu->cfg.use_hw_mul)) {
662 return;
663 }
664
665 subcode = dc->imm & 3;
666
667 if (dc->type_b) {
668 tcg_gen_mul_i32(cpu_R[dc->rd], cpu_R[dc->ra], *(dec_alu_op_b(dc)));
669 return;
670 }
671
672 /* mulh, mulhsu and mulhu are not available if C_USE_HW_MUL is < 2. */
673 if (subcode >= 1 && subcode <= 3 && dc->cpu->cfg.use_hw_mul < 2) {
674 /* nop??? */
675 }
676
677 tmp = tcg_temp_new_i32();
678 switch (subcode) {
679 case 0:
680 tcg_gen_mul_i32(cpu_R[dc->rd], cpu_R[dc->ra], cpu_R[dc->rb]);
681 break;
682 case 1:
683 tcg_gen_muls2_i32(tmp, cpu_R[dc->rd],
684 cpu_R[dc->ra], cpu_R[dc->rb]);
685 break;
686 case 2:
687 tcg_gen_mulsu2_i32(tmp, cpu_R[dc->rd],
688 cpu_R[dc->ra], cpu_R[dc->rb]);
689 break;
690 case 3:
691 tcg_gen_mulu2_i32(tmp, cpu_R[dc->rd], cpu_R[dc->ra], cpu_R[dc->rb]);
692 break;
693 default:
694 cpu_abort(CPU(dc->cpu), "unknown MUL insn %x\n", subcode);
695 break;
696 }
697 tcg_temp_free_i32(tmp);
698}
699
700/* Div unit. */
701static void dec_div(DisasContext *dc)
702{
703 unsigned int u;
704
705 u = dc->imm & 2;
706
707 if (trap_illegal(dc, !dc->cpu->cfg.use_div)) {

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1574 {DEC_BARREL, dec_barrel},
1575 {DEC_LD, dec_load},
1576 {DEC_ST, dec_store},
1577 {DEC_IMM, dec_imm},
1578 {DEC_BR, dec_br},
1579 {DEC_BCC, dec_bcc},
1580 {DEC_RTS, dec_rts},
1581 {DEC_FPU, dec_fpu},
686/* Div unit. */
687static void dec_div(DisasContext *dc)
688{
689 unsigned int u;
690
691 u = dc->imm & 2;
692
693 if (trap_illegal(dc, !dc->cpu->cfg.use_div)) {

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1560 {DEC_BARREL, dec_barrel},
1561 {DEC_LD, dec_load},
1562 {DEC_ST, dec_store},
1563 {DEC_IMM, dec_imm},
1564 {DEC_BR, dec_br},
1565 {DEC_BCC, dec_bcc},
1566 {DEC_RTS, dec_rts},
1567 {DEC_FPU, dec_fpu},
1582 {DEC_MUL, dec_mul},
1583 {DEC_DIV, dec_div},
1584 {DEC_MSR, dec_msr},
1585 {DEC_STREAM, dec_stream},
1586 {{0, 0}, dec_null}
1587};
1588
1589static void old_decode(DisasContext *dc, uint32_t ir)
1590{

--- 291 unchanged lines hidden --- 		1568 {DEC_DIV, dec_div},
1569 {DEC_MSR, dec_msr},
1570 {DEC_STREAM, dec_stream},
1571 {{0, 0}, dec_null}
1572};
1573
1574static void old_decode(DisasContext *dc, uint32_t ir)
1575{

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