| translate.c (78e9caf2f9410c8b90bb6d5a6449c750056c3f8a) | translate.c (5a8e01366c5dfe93f608e7d37f385962495d5161) |
|---|---|
| 1/* 2 * Xilinx MicroBlaze emulation for qemu: main translation routines. 3 * 4 * Copyright (c) 2009 Edgar E. Iglesias. 5 * Copyright (c) 2009-2012 PetaLogix Qld Pty Ltd. 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public --- 1796 unchanged lines hidden (view full) --- 1805 } 1806 1807 qemu_fprintf(f, "IN: PC=%" PRIx64 " %s\n", 1808 env->pc, lookup_symbol(env->pc)); 1809 qemu_fprintf(f, "rmsr=%" PRIx64 " resr=%" PRIx64 " rear=%" PRIx64 " " 1810 "debug=%x imm=%x iflags=%x fsr=%" PRIx64 " " 1811 "rbtr=%" PRIx64 "\n", 1812 env->msr, env->esr, env->ear, | 1/* 2 * Xilinx MicroBlaze emulation for qemu: main translation routines. 3 * 4 * Copyright (c) 2009 Edgar E. Iglesias. 5 * Copyright (c) 2009-2012 PetaLogix Qld Pty Ltd. 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public --- 1796 unchanged lines hidden (view full) --- 1805 } 1806 1807 qemu_fprintf(f, "IN: PC=%" PRIx64 " %s\n", 1808 env->pc, lookup_symbol(env->pc)); 1809 qemu_fprintf(f, "rmsr=%" PRIx64 " resr=%" PRIx64 " rear=%" PRIx64 " " 1810 "debug=%x imm=%x iflags=%x fsr=%" PRIx64 " " 1811 "rbtr=%" PRIx64 "\n", 1812 env->msr, env->esr, env->ear, |
| 1813 env->debug, env->imm, env->iflags, env->sregs[SR_FSR], | 1813 env->debug, env->imm, env->iflags, env->fsr, |
| 1814 env->sregs[SR_BTR]); 1815 qemu_fprintf(f, "btaken=%d btarget=%" PRIx64 " mode=%s(saved=%s) " 1816 "eip=%d ie=%d\n", 1817 env->btaken, env->btarget, 1818 (env->msr & MSR_UM) ? "user" : "kernel", 1819 (env->msr & MSR_UMS) ? "user" : "kernel", 1820 (bool)(env->msr & MSR_EIP), 1821 (bool)(env->msr & MSR_IE)); --- 50 unchanged lines hidden (view full) --- 1872 cpu_SR[SR_PC] = 1873 tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, pc), "rpc"); 1874 cpu_SR[SR_MSR] = 1875 tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, msr), "rmsr"); 1876 cpu_SR[SR_EAR] = 1877 tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, ear), "rear"); 1878 cpu_SR[SR_ESR] = 1879 tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, esr), "resr"); | 1814 env->sregs[SR_BTR]); 1815 qemu_fprintf(f, "btaken=%d btarget=%" PRIx64 " mode=%s(saved=%s) " 1816 "eip=%d ie=%d\n", 1817 env->btaken, env->btarget, 1818 (env->msr & MSR_UM) ? "user" : "kernel", 1819 (env->msr & MSR_UMS) ? "user" : "kernel", 1820 (bool)(env->msr & MSR_EIP), 1821 (bool)(env->msr & MSR_IE)); --- 50 unchanged lines hidden (view full) --- 1872 cpu_SR[SR_PC] = 1873 tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, pc), "rpc"); 1874 cpu_SR[SR_MSR] = 1875 tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, msr), "rmsr"); 1876 cpu_SR[SR_EAR] = 1877 tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, ear), "rear"); 1878 cpu_SR[SR_ESR] = 1879 tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, esr), "resr"); |
| 1880 cpu_SR[SR_FSR] = 1881 tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, fsr), "rfsr"); |
|
| 1880 | 1882 |
| 1881 for (i = SR_ESR + 1; i < ARRAY_SIZE(cpu_SR); i++) { | 1883 for (i = SR_FSR + 1; i < ARRAY_SIZE(cpu_SR); i++) { |
| 1882 cpu_SR[i] = tcg_global_mem_new_i64(cpu_env, 1883 offsetof(CPUMBState, sregs[i]), 1884 special_regnames[i]); 1885 } 1886} 1887 1888void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, 1889 target_ulong *data) 1890{ 1891 env->pc = data[0]; 1892} | 1884 cpu_SR[i] = tcg_global_mem_new_i64(cpu_env, 1885 offsetof(CPUMBState, sregs[i]), 1886 special_regnames[i]); 1887 } 1888} 1889 1890void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, 1891 target_ulong *data) 1892{ 1893 env->pc = data[0]; 1894} |