translate.c (47709e4c66239819cfe2e965e6aa30b646c09ad6) translate.c (9b9643181a2324f4ecefd39367fd83be2ba837d6)
1/*
2 * Xilinx MicroBlaze emulation for qemu: main translation routines.
3 *
4 * Copyright (c) 2009 Edgar E. Iglesias.
5 * Copyright (c) 2009-2012 PetaLogix Qld Pty Ltd.
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public

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584/* Multiplier unit. */
585static void dec_mul(DisasContext *dc)
586{
587 TCGv tmp;
588 unsigned int subcode;
589
590 if ((dc->tb_flags & MSR_EE_FLAG)
591 && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)
1/*
2 * Xilinx MicroBlaze emulation for qemu: main translation routines.
3 *
4 * Copyright (c) 2009 Edgar E. Iglesias.
5 * Copyright (c) 2009-2012 PetaLogix Qld Pty Ltd.
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public

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584/* Multiplier unit. */
585static void dec_mul(DisasContext *dc)
586{
587 TCGv tmp;
588 unsigned int subcode;
589
590 if ((dc->tb_flags & MSR_EE_FLAG)
591 && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)
592 && !(dc->cpu->env.pvr.regs[0] & PVR0_USE_HW_MUL_MASK)) {
592 && !dc->cpu->cfg.use_hw_mul) {
593 tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);
594 t_gen_raise_exception(dc, EXCP_HW_EXCP);
595 return;
596 }
597
598 subcode = dc->imm & 3;
599
600 if (dc->type_b) {
601 LOG_DIS("muli r%d r%d %x\n", dc->rd, dc->ra, dc->imm);
602 tcg_gen_mul_tl(cpu_R[dc->rd], cpu_R[dc->ra], *(dec_alu_op_b(dc)));
603 return;
604 }
605
606 /* mulh, mulhsu and mulhu are not available if C_USE_HW_MUL is < 2. */
593 tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);
594 t_gen_raise_exception(dc, EXCP_HW_EXCP);
595 return;
596 }
597
598 subcode = dc->imm & 3;
599
600 if (dc->type_b) {
601 LOG_DIS("muli r%d r%d %x\n", dc->rd, dc->ra, dc->imm);
602 tcg_gen_mul_tl(cpu_R[dc->rd], cpu_R[dc->ra], *(dec_alu_op_b(dc)));
603 return;
604 }
605
606 /* mulh, mulhsu and mulhu are not available if C_USE_HW_MUL is < 2. */
607 if (subcode >= 1 && subcode <= 3
608 && !((dc->cpu->env.pvr.regs[2] & PVR2_USE_MUL64_MASK))) {
607 if (subcode >= 1 && subcode <= 3 && dc->cpu->cfg.use_hw_mul < 2) {
609 /* nop??? */
610 }
611
612 tmp = tcg_temp_new();
613 switch (subcode) {
614 case 0:
615 LOG_DIS("mul r%d r%d r%d\n", dc->rd, dc->ra, dc->rb);
616 tcg_gen_mul_tl(cpu_R[dc->rd], cpu_R[dc->ra], cpu_R[dc->rb]);

--- 1256 unchanged lines hidden --- 		608 /* nop??? */
609 }
610
611 tmp = tcg_temp_new();
612 switch (subcode) {
613 case 0:
614 LOG_DIS("mul r%d r%d r%d\n", dc->rd, dc->ra, dc->rb);
615 tcg_gen_mul_tl(cpu_R[dc->rd], cpu_R[dc->ra], cpu_R[dc->rb]);

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