| ops_sse.h (b98f886c8f8661773047197d132efec97810b37a) | ops_sse.h (a64eee3ab402469b536db9aeb259097b84d31d0f) |
|---|---|
| 1/* 2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support 3 * 4 * Copyright (c) 2005 Fabrice Bellard 5 * Copyright (c) 2008 Intel Corporation <andrew.zaborowski@intel.com> 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public --- 1591 unchanged lines hidden (view full) --- 1600#define FSIGNB(d, s) (s <= INT8_MAX ? s ? d : 0 : -(int8_t)d) 1601#define FSIGNW(d, s) (s <= INT16_MAX ? s ? d : 0 : -(int16_t)d) 1602#define FSIGNL(d, s) (s <= INT32_MAX ? s ? d : 0 : -(int32_t)d) 1603SSE_HELPER_B(helper_psignb, FSIGNB) 1604SSE_HELPER_W(helper_psignw, FSIGNW) 1605SSE_HELPER_L(helper_psignd, FSIGNL) 1606 1607void glue(helper_palignr, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, | 1/* 2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support 3 * 4 * Copyright (c) 2005 Fabrice Bellard 5 * Copyright (c) 2008 Intel Corporation <andrew.zaborowski@intel.com> 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public --- 1591 unchanged lines hidden (view full) --- 1600#define FSIGNB(d, s) (s <= INT8_MAX ? s ? d : 0 : -(int8_t)d) 1601#define FSIGNW(d, s) (s <= INT16_MAX ? s ? d : 0 : -(int16_t)d) 1602#define FSIGNL(d, s) (s <= INT32_MAX ? s ? d : 0 : -(int32_t)d) 1603SSE_HELPER_B(helper_psignb, FSIGNB) 1604SSE_HELPER_W(helper_psignw, FSIGNW) 1605SSE_HELPER_L(helper_psignd, FSIGNL) 1606 1607void glue(helper_palignr, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, |
| 1608 int32_t shift) | 1608 uint32_t imm) |
| 1609{ 1610 int i; 1611 1612 /* XXX could be checked during translation */ | 1609{ 1610 int i; 1611 1612 /* XXX could be checked during translation */ |
| 1613 if (shift >= (SHIFT ? 32 : 16)) { | 1613 if (imm >= (SHIFT ? 32 : 16)) { |
| 1614 for (i = 0; i < (1 << SHIFT); i++) { 1615 d->Q(i) = 0; 1616 } 1617 } else { | 1614 for (i = 0; i < (1 << SHIFT); i++) { 1615 d->Q(i) = 0; 1616 } 1617 } else { |
| 1618 shift <<= 3; | 1618 int shift = imm * 8; |
| 1619#define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0) 1620#if SHIFT == 0 1621 d->Q(0) = SHR(s->Q(0), shift - 0) | 1622 SHR(v->Q(0), shift - 64); 1623#else 1624 for (i = 0; i < (1 << SHIFT); i += 2) { 1625 uint64_t r0, r1; 1626 --- 461 unchanged lines hidden (view full) --- 2088 return (int8_t)r->B(i); 2089 case 3: 2090 default: 2091 return (int16_t)r->W(i); 2092 } 2093} 2094 2095static inline unsigned pcmpxstrx(CPUX86State *env, Reg *d, Reg *s, | 1619#define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0) 1620#if SHIFT == 0 1621 d->Q(0) = SHR(s->Q(0), shift - 0) | 1622 SHR(v->Q(0), shift - 64); 1623#else 1624 for (i = 0; i < (1 << SHIFT); i += 2) { 1625 uint64_t r0, r1; 1626 --- 461 unchanged lines hidden (view full) --- 2088 return (int8_t)r->B(i); 2089 case 3: 2090 default: 2091 return (int16_t)r->W(i); 2092 } 2093} 2094 2095static inline unsigned pcmpxstrx(CPUX86State *env, Reg *d, Reg *s, |
| 2096 int8_t ctrl, int valids, int validd) | 2096 uint8_t ctrl, int valids, int validd) |
| 2097{ 2098 unsigned int res = 0; 2099 int v; 2100 int j, i; 2101 int upper = (ctrl & 1) ? 7 : 15; 2102 2103 valids--; 2104 validd--; --- 290 unchanged lines hidden --- | 2097{ 2098 unsigned int res = 0; 2099 int v; 2100 int j, i; 2101 int upper = (ctrl & 1) ? 7 : 15; 2102 2103 valids--; 2104 validd--; --- 290 unchanged lines hidden --- |