| macros.h (15df33ceb73cb6bb3c6736cf4d2cff51129ed4b4) | macros.h (1e536334ccb0a1606f814a38a4996b3b818e9fab) |
|---|---|
| 1/* 2 * Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * --- 274 unchanged lines hidden (view full) --- 283#ifdef QEMU_GENERATE 284#define fLOADMMV(EA, DST) gen_vreg_load(ctx, DST##_off, EA, true) 285#endif 286#ifdef QEMU_GENERATE 287#define fLOADMMVU(EA, DST) gen_vreg_load(ctx, DST##_off, EA, false) 288#endif 289#ifdef QEMU_GENERATE 290#define fSTOREMMV(EA, SRC) \ | 1/* 2 * Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * --- 274 unchanged lines hidden (view full) --- 283#ifdef QEMU_GENERATE 284#define fLOADMMV(EA, DST) gen_vreg_load(ctx, DST##_off, EA, true) 285#endif 286#ifdef QEMU_GENERATE 287#define fLOADMMVU(EA, DST) gen_vreg_load(ctx, DST##_off, EA, false) 288#endif 289#ifdef QEMU_GENERATE 290#define fSTOREMMV(EA, SRC) \ |
| 291 gen_vreg_store(ctx, insn, pkt, EA, SRC##_off, insn->slot, true) | 291 gen_vreg_store(ctx, EA, SRC##_off, insn->slot, true) |
| 292#endif 293#ifdef QEMU_GENERATE 294#define fSTOREMMVQ(EA, SRC, MASK) \ 295 gen_vreg_masked_store(ctx, EA, SRC##_off, MASK##_off, insn->slot, false) 296#endif 297#ifdef QEMU_GENERATE 298#define fSTOREMMVNQ(EA, SRC, MASK) \ 299 gen_vreg_masked_store(ctx, EA, SRC##_off, MASK##_off, insn->slot, true) 300#endif 301#ifdef QEMU_GENERATE 302#define fSTOREMMVU(EA, SRC) \ | 292#endif 293#ifdef QEMU_GENERATE 294#define fSTOREMMVQ(EA, SRC, MASK) \ 295 gen_vreg_masked_store(ctx, EA, SRC##_off, MASK##_off, insn->slot, false) 296#endif 297#ifdef QEMU_GENERATE 298#define fSTOREMMVNQ(EA, SRC, MASK) \ 299 gen_vreg_masked_store(ctx, EA, SRC##_off, MASK##_off, insn->slot, true) 300#endif 301#ifdef QEMU_GENERATE 302#define fSTOREMMVU(EA, SRC) \ |
| 303 gen_vreg_store(ctx, insn, pkt, EA, SRC##_off, insn->slot, false) | 303 gen_vreg_store(ctx, EA, SRC##_off, insn->slot, false) |
| 304#endif 305#define fVFOREACH(WIDTH, VAR) for (VAR = 0; VAR < fVELEM(WIDTH); VAR++) 306#define fVARRAY_ELEMENT_ACCESS(ARRAY, TYPE, INDEX) \ 307 ARRAY.v[(INDEX) / (fVECSIZE() / (sizeof(ARRAY.TYPE[0])))].TYPE[(INDEX) % \ 308 (fVECSIZE() / (sizeof(ARRAY.TYPE[0])))] 309 310#define fVSATDW(U, V) fVSATW(((((long long)U) << 32) | fZXTN(32, 64, V))) 311#define fVASL_SATHI(U, V) fVSATW(((U) << 1) | ((V) >> 31)) --- 39 unchanged lines hidden --- | 304#endif 305#define fVFOREACH(WIDTH, VAR) for (VAR = 0; VAR < fVELEM(WIDTH); VAR++) 306#define fVARRAY_ELEMENT_ACCESS(ARRAY, TYPE, INDEX) \ 307 ARRAY.v[(INDEX) / (fVECSIZE() / (sizeof(ARRAY.TYPE[0])))].TYPE[(INDEX) % \ 308 (fVECSIZE() / (sizeof(ARRAY.TYPE[0])))] 309 310#define fVSATDW(U, V) fVSATW(((((long long)U) << 32) | fZXTN(32, 64, V))) 311#define fVASL_SATHI(U, V) fVSATW(((U) << 1) | ((V) >> 31)) --- 39 unchanged lines hidden --- |