internals.h (2663c41cfa2c3be34c62de97902a375b81027efd) internals.h (073011612b44771190bc091e459d0642d46c69b5)
1/*
2 * QEMU ARM CPU -- internal functions and types
3 *
4 * Copyright (c) 2014 Linaro Ltd
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

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1283 return (1 << 31) | ((1 << pmu_num_counters(env)) - 1);
1284}
1285
1286#ifdef TARGET_AARCH64
1287int arm_gdb_get_svereg(CPUARMState *env, GByteArray *buf, int reg);
1288int arm_gdb_set_svereg(CPUARMState *env, uint8_t *buf, int reg);
1289int aarch64_fpu_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg);
1290int aarch64_fpu_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg);
1/*
2 * QEMU ARM CPU -- internal functions and types
3 *
4 * Copyright (c) 2014 Linaro Ltd
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

--- 1274 unchanged lines hidden (view full) ---

1283 return (1 << 31) | ((1 << pmu_num_counters(env)) - 1);
1284}
1285
1286#ifdef TARGET_AARCH64
1287int arm_gdb_get_svereg(CPUARMState *env, GByteArray *buf, int reg);
1288int arm_gdb_set_svereg(CPUARMState *env, uint8_t *buf, int reg);
1289int aarch64_fpu_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg);
1290int aarch64_fpu_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg);
1291void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
1292void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
1293void arm_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp);
1291#endif
1292
1293#ifdef CONFIG_USER_ONLY
1294static inline void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu) { }
1295#else
1296void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu);
1297#endif
1298

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1295
1296#ifdef CONFIG_USER_ONLY
1297static inline void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu) { }
1298#else
1299void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu);
1300#endif
1301

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