hvf.c (ed72f34421f8900d9fedef4a37722522cf0bf3e7) hvf.c (9323e79f10e5f5d8fffc3b307776173ca11faeae)
1/*
2 * QEMU Hypervisor.framework support for Apple Silicon
3
4 * Copyright 2020 Alexander Graf <agraf@csgraf.de>
5 * Copyright 2020 Google LLC
6 *
7 * This work is licensed under the terms of the GNU GPL, version 2 or later.
8 * See the COPYING file in the top-level directory.

--- 964 unchanged lines hidden (view full) ---

973
974 if (val & PMCRP) {
975 unsigned int i;
976 for (i = 0; i < pmu_num_counters(env); i++) {
977 env->cp15.c14_pmevcntr[i] = 0;
978 }
979 }
980
1/*
2 * QEMU Hypervisor.framework support for Apple Silicon
3
4 * Copyright 2020 Alexander Graf <agraf@csgraf.de>
5 * Copyright 2020 Google LLC
6 *
7 * This work is licensed under the terms of the GNU GPL, version 2 or later.
8 * See the COPYING file in the top-level directory.

--- 964 unchanged lines hidden (view full) ---

973
974 if (val & PMCRP) {
975 unsigned int i;
976 for (i = 0; i < pmu_num_counters(env); i++) {
977 env->cp15.c14_pmevcntr[i] = 0;
978 }
979 }
980
981 env->cp15.c9_pmcr &= ~PMCR_WRITEABLE_MASK;
982 env->cp15.c9_pmcr |= (val & PMCR_WRITEABLE_MASK);
981 env->cp15.c9_pmcr &= ~PMCR_WRITABLE_MASK;
982 env->cp15.c9_pmcr |= (val & PMCR_WRITABLE_MASK);
983
984 pmu_op_finish(env);
985 break;
986 case SYSREG_PMUSERENR_EL0:
987 env->cp15.c9_pmuserenr = val & 0xf;
988 break;
989 case SYSREG_PMCNTENSET_EL0:
990 env->cp15.c9_pmcnten |= (val & pmu_counter_mask(env));

--- 359 unchanged lines hidden --- 		983
984 pmu_op_finish(env);
985 break;
986 case SYSREG_PMUSERENR_EL0:
987 env->cp15.c9_pmuserenr = val & 0xf;
988 break;
989 case SYSREG_PMCNTENSET_EL0:
990 env->cp15.c9_pmcnten |= (val & pmu_counter_mask(env));

--- 359 unchanged lines hidden ---