helper.c (88ce6c6ee85d902f59dc65afc3ca86b34f02b9ed) helper.c (4426d3617d64922d97b74ed22e67e33b6fb7de0a)
1/*
2 * ARM generic helpers.
3 *
4 * This code is licensed under the GNU GPL v2 or later.
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8

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6247 /* Define v7 and v8 architectural debug registers.
6248 * These are just dummy implementations for now.
6249 */
6250 int i;
6251 int wrps, brps, ctx_cmps;
6252 ARMCPRegInfo dbgdidr = {
6253 .name = "DBGDIDR", .cp = 14, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 0,
6254 .access = PL0_R, .accessfn = access_tda,
1/*
2 * ARM generic helpers.
3 *
4 * This code is licensed under the GNU GPL v2 or later.
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8

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6247 /* Define v7 and v8 architectural debug registers.
6248 * These are just dummy implementations for now.
6249 */
6250 int i;
6251 int wrps, brps, ctx_cmps;
6252 ARMCPRegInfo dbgdidr = {
6253 .name = "DBGDIDR", .cp = 14, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 0,
6254 .access = PL0_R, .accessfn = access_tda,
6255 .type = ARM_CP_CONST, .resetvalue = cpu->dbgdidr,
6255 .type = ARM_CP_CONST, .resetvalue = cpu->isar.dbgdidr,
6256 };
6257
6258 /* Note that all these register fields hold "number of Xs minus 1". */
6259 brps = arm_num_brps(cpu);
6260 wrps = arm_num_wrps(cpu);
6261 ctx_cmps = arm_num_ctx_cmps(cpu);
6262
6263 assert(ctx_cmps <= brps);

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6257
6258 /* Note that all these register fields hold "number of Xs minus 1". */
6259 brps = arm_num_brps(cpu);
6260 wrps = arm_num_wrps(cpu);
6261 ctx_cmps = arm_num_ctx_cmps(cpu);
6262
6263 assert(ctx_cmps <= brps);

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