cpu64.c (126eeee6c7b516e0a348dd4d60e59dbfa4b4b513) cpu64.c (ce3125bed935a12e619a8253c19340ecaa899347)
1/*
2 * QEMU AArch64 CPU
3 *
4 * Copyright (c) 2013 Linaro Ltd
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

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668 cpu->isar.id_aa64pfr1 = t;
669
670 t = cpu->isar.id_aa64mmfr1;
671 t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */
672 t = FIELD_DP64(t, ID_AA64MMFR1, LO, 1);
673 t = FIELD_DP64(t, ID_AA64MMFR1, VH, 1);
674 t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */
675 t = FIELD_DP64(t, ID_AA64MMFR1, VMIDBITS, 2); /* VMID16 */
1/*
2 * QEMU AArch64 CPU
3 *
4 * Copyright (c) 2013 Linaro Ltd
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

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668 cpu->isar.id_aa64pfr1 = t;
669
670 t = cpu->isar.id_aa64mmfr1;
671 t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */
672 t = FIELD_DP64(t, ID_AA64MMFR1, LO, 1);
673 t = FIELD_DP64(t, ID_AA64MMFR1, VH, 1);
674 t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */
675 t = FIELD_DP64(t, ID_AA64MMFR1, VMIDBITS, 2); /* VMID16 */
676 t = FIELD_DP64(t, ID_AA64MMFR1, XNX, 1); /* TTS2UXN */
676 cpu->isar.id_aa64mmfr1 = t;
677
678 t = cpu->isar.id_aa64mmfr2;
679 t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1);
680 t = FIELD_DP64(t, ID_AA64MMFR2, CNP, 1); /* TTCNP */
681 cpu->isar.id_aa64mmfr2 = t;
682
683 /* Replicate the same data to the 32-bit id registers. */

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701 u = cpu->isar.id_mmfr3;
702 u = FIELD_DP32(u, ID_MMFR3, PAN, 2); /* ATS1E1 */
703 cpu->isar.id_mmfr3 = u;
704
705 u = cpu->isar.id_mmfr4;
706 u = FIELD_DP32(u, ID_MMFR4, HPDS, 1); /* AA32HPD */
707 u = FIELD_DP32(u, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
708 u = FIELD_DP32(u, ID_MMFR4, CNP, 1); /* TTCNP */
677 cpu->isar.id_aa64mmfr1 = t;
678
679 t = cpu->isar.id_aa64mmfr2;
680 t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1);
681 t = FIELD_DP64(t, ID_AA64MMFR2, CNP, 1); /* TTCNP */
682 cpu->isar.id_aa64mmfr2 = t;
683
684 /* Replicate the same data to the 32-bit id registers. */

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702 u = cpu->isar.id_mmfr3;
703 u = FIELD_DP32(u, ID_MMFR3, PAN, 2); /* ATS1E1 */
704 cpu->isar.id_mmfr3 = u;
705
706 u = cpu->isar.id_mmfr4;
707 u = FIELD_DP32(u, ID_MMFR4, HPDS, 1); /* AA32HPD */
708 u = FIELD_DP32(u, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
709 u = FIELD_DP32(u, ID_MMFR4, CNP, 1); /* TTCNP */
710 u = FIELD_DP32(u, ID_MMFR4, XNX, 1); /* TTS2UXN */
709 cpu->isar.id_mmfr4 = u;
710
711 u = cpu->isar.id_aa64dfr0;
712 u = FIELD_DP64(u, ID_AA64DFR0, PMUVER, 5); /* v8.4-PMU */
713 cpu->isar.id_aa64dfr0 = u;
714
715 u = cpu->isar.id_dfr0;
716 u = FIELD_DP32(u, ID_DFR0, PERFMON, 5); /* v8.4-PMU */

--- 145 unchanged lines hidden --- 		711 cpu->isar.id_mmfr4 = u;
712
713 u = cpu->isar.id_aa64dfr0;
714 u = FIELD_DP64(u, ID_AA64DFR0, PMUVER, 5); /* v8.4-PMU */
715 cpu->isar.id_aa64dfr0 = u;
716
717 u = cpu->isar.id_dfr0;
718 u = FIELD_DP32(u, ID_DFR0, PERFMON, 5); /* v8.4-PMU */

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