cpu.h (eac92d316351b855ba79eb374dd21cc367f1f9c1) cpu.h (0e0c030c681730f3ec55ba3b223b608a8f3e8282)
1/*
2 * ARM virtual CPU header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

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716 uint32_t rnr;
717 uint32_t ctrl;
718 } sau;
719
720 void *nvic;
721 const struct arm_boot_info *boot_info;
722 /* Store GICv3CPUState to access from this struct */
723 void *gicv3state;
1/*
2 * ARM virtual CPU header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

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716 uint32_t rnr;
717 uint32_t ctrl;
718 } sau;
719
720 void *nvic;
721 const struct arm_boot_info *boot_info;
722 /* Store GICv3CPUState to access from this struct */
723 void *gicv3state;
724
725#ifdef TARGET_TAGGED_ADDRESSES
726 /* Linux syscall tagged address support */
727 bool tagged_addr_enable;
728#endif
724} CPUARMState;
725
726static inline void set_feature(CPUARMState *env, int feature)
727{
728 env->features |= 1ULL << feature;
729}
730
731static inline void unset_feature(CPUARMState *env, int feature)

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3599#define arm_tlb_bti_gp(x) (typecheck_memtxattrs(x)->target_tlb_bit0)
3600#define arm_tlb_mte_tagged(x) (typecheck_memtxattrs(x)->target_tlb_bit1)
3601
3602/*
3603 * AArch64 usage of the PAGE_TARGET_* bits for linux-user.
3604 */
3605#define PAGE_BTI PAGE_TARGET_1
3606
729} CPUARMState;
730
731static inline void set_feature(CPUARMState *env, int feature)
732{
733 env->features |= 1ULL << feature;
734}
735
736static inline void unset_feature(CPUARMState *env, int feature)

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3604#define arm_tlb_bti_gp(x) (typecheck_memtxattrs(x)->target_tlb_bit0)
3605#define arm_tlb_mte_tagged(x) (typecheck_memtxattrs(x)->target_tlb_bit1)
3606
3607/*
3608 * AArch64 usage of the PAGE_TARGET_* bits for linux-user.
3609 */
3610#define PAGE_BTI PAGE_TARGET_1
3611
3612#ifdef TARGET_TAGGED_ADDRESSES
3613/**
3614 * cpu_untagged_addr:
3615 * @cs: CPU context
3616 * @x: tagged address
3617 *
3618 * Remove any address tag from @x. This is explicitly related to the
3619 * linux syscall TIF_TAGGED_ADDR setting, not TBI in general.
3620 *
3621 * There should be a better place to put this, but we need this in
3622 * include/exec/cpu_ldst.h, and not some place linux-user specific.
3623 */
3624static inline target_ulong cpu_untagged_addr(CPUState *cs, target_ulong x)
3625{
3626 ARMCPU *cpu = ARM_CPU(cs);
3627 if (cpu->env.tagged_addr_enable) {
3628 /*
3629 * TBI is enabled for userspace but not kernelspace addresses.
3630 * Only clear the tag if bit 55 is clear.
3631 */
3632 x &= sextract64(x, 0, 56);
3633 }
3634 return x;
3635}
3636#endif
3637
3607/*
3608 * Naming convention for isar_feature functions:
3609 * Functions which test 32-bit ID registers should have _aa32_ in
3610 * their name. Functions which test 64-bit ID registers should have
3611 * _aa64_ in their name. These must only be used in code where we
3612 * know for certain that the CPU has AArch32 or AArch64 respectively
3613 * or where the correct answer for a CPU which doesn't implement that
3614 * CPU state is "false" (eg when generating A32 or A64 code, if adding

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3639 * Naming convention for isar_feature functions:
3640 * Functions which test 32-bit ID registers should have _aa32_ in
3641 * their name. Functions which test 64-bit ID registers should have
3642 * _aa64_ in their name. These must only be used in code where we
3643 * know for certain that the CPU has AArch32 or AArch64 respectively
3644 * or where the correct answer for a CPU which doesn't implement that
3645 * CPU state is "false" (eg when generating A32 or A64 code, if adding

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