cpu.c (d316f1b14615854de1bf4c0a9789e9c8951cc437) cpu.c (a575230f95cf6b05e5ba97f5f52e33b0878bc0aa)
1/*
2 * QEMU ARM CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

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1804}
1805
1806static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
1807{
1808 CPUState *cs = CPU(dev);
1809 ARMCPU *cpu = ARM_CPU(dev);
1810 ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
1811 CPUARMState *env = &cpu->env;
1/*
2 * QEMU ARM CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

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1804}
1805
1806static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
1807{
1808 CPUState *cs = CPU(dev);
1809 ARMCPU *cpu = ARM_CPU(dev);
1810 ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
1811 CPUARMState *env = &cpu->env;
1812 int pagebits;
1813 Error *local_err = NULL;
1814
1815#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
1816 /* Use pc-relative instructions in system-mode */
1817 cs->tcg_cflags |= CF_PCREL;
1818#endif
1819
1820 /* If we needed to query the host kernel for the CPU features

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2095 /*
2096 * We rely on no XScale CPU having VFP so we can use the same bits in the
2097 * TB flags field for VECSTRIDE and XSCALE_CPAR.
2098 */
2099 assert(arm_feature(&cpu->env, ARM_FEATURE_AARCH64) ||
2100 !cpu_isar_feature(aa32_vfp_simd, cpu) ||
2101 !arm_feature(env, ARM_FEATURE_XSCALE));
2102
1812 Error *local_err = NULL;
1813
1814#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
1815 /* Use pc-relative instructions in system-mode */
1816 cs->tcg_cflags |= CF_PCREL;
1817#endif
1818
1819 /* If we needed to query the host kernel for the CPU features

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2094 /*
2095 * We rely on no XScale CPU having VFP so we can use the same bits in the
2096 * TB flags field for VECSTRIDE and XSCALE_CPAR.
2097 */
2098 assert(arm_feature(&cpu->env, ARM_FEATURE_AARCH64) ||
2099 !cpu_isar_feature(aa32_vfp_simd, cpu) ||
2100 !arm_feature(env, ARM_FEATURE_XSCALE));
2101
2103 if (arm_feature(env, ARM_FEATURE_V7) &&
2104 !arm_feature(env, ARM_FEATURE_M) &&
2105 !arm_feature(env, ARM_FEATURE_PMSA)) {
2106 /* v7VMSA drops support for the old ARMv5 tiny pages, so we
2107 * can use 4K pages.
2108 */
2109 pagebits = 12;
2110 } else {
2111 /* For CPUs which might have tiny 1K pages, or which have an
2112 * MPU and might have small region sizes, stick with 1K pages.
2113 */
2114 pagebits = 10;
2102#ifndef CONFIG_USER_ONLY
2103 {
2104 int pagebits;
2105 if (arm_feature(env, ARM_FEATURE_V7) &&
2106 !arm_feature(env, ARM_FEATURE_M) &&
2107 !arm_feature(env, ARM_FEATURE_PMSA)) {
2108 /*
2109 * v7VMSA drops support for the old ARMv5 tiny pages,
2110 * so we can use 4K pages.
2111 */
2112 pagebits = 12;
2113 } else {
2114 /*
2115 * For CPUs which might have tiny 1K pages, or which have an
2116 * MPU and might have small region sizes, stick with 1K pages.
2117 */
2118 pagebits = 10;
2119 }
2120 if (!set_preferred_target_page_bits(pagebits)) {
2121 /*
2122 * This can only ever happen for hotplugging a CPU, or if
2123 * the board code incorrectly creates a CPU which it has
2124 * promised via minimum_page_size that it will not.
2125 */
2126 error_setg(errp, "This CPU requires a smaller page size "
2127 "than the system is using");
2128 return;
2129 }
2115 }
2130 }
2116 if (!set_preferred_target_page_bits(pagebits)) {
2117 /* This can only ever happen for hotplugging a CPU, or if
2118 * the board code incorrectly creates a CPU which it has
2119 * promised via minimum_page_size that it will not.
2120 */
2121 error_setg(errp, "This CPU requires a smaller page size than the "
2122 "system is using");
2123 return;
2124 }
2131#endif
2125
2126 /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it.
2127 * We don't support setting cluster ID ([16..23]) (known as Aff2
2128 * in later ARM ARM versions), or any of the higher affinity level fields,
2129 * so these bits always RAZ.
2130 */
2131 if (cpu->mp_affinity == ARM64_AFFINITY_INVALID) {
2132 cpu->mp_affinity = arm_build_mp_affinity(cs->cpu_index,

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2133 /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it.
2134 * We don't support setting cluster ID ([16..23]) (known as Aff2
2135 * in later ARM ARM versions), or any of the higher affinity level fields,
2136 * so these bits always RAZ.
2137 */
2138 if (cpu->mp_affinity == ARM64_AFFINITY_INVALID) {
2139 cpu->mp_affinity = arm_build_mp_affinity(cs->cpu_index,

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