cpu.c (26c470a7bb4233454137de1062341ad48947f252) cpu.c (5110e6836b7fa698b0c383fbd5dffbee035935d3)
1/*
2 * QEMU ARM CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

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795 cpu_exec_realizefn(cs, &local_err);
796 if (local_err != NULL) {
797 error_propagate(errp, local_err);
798 return;
799 }
800
801 /* Some features automatically imply others: */
802 if (arm_feature(env, ARM_FEATURE_V8)) {
1/*
2 * QEMU ARM CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

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795 cpu_exec_realizefn(cs, &local_err);
796 if (local_err != NULL) {
797 error_propagate(errp, local_err);
798 return;
799 }
800
801 /* Some features automatically imply others: */
802 if (arm_feature(env, ARM_FEATURE_V8)) {
803 set_feature(env, ARM_FEATURE_V7);
803 set_feature(env, ARM_FEATURE_V7VE);
804 }
805 if (arm_feature(env, ARM_FEATURE_V7VE)) {
806 /* v7 Virtualization Extensions. In real hardware this implies
807 * EL2 and also the presence of the Security Extensions.
808 * For QEMU, for backwards-compatibility we implement some
809 * CPUs or CPU configs which have no actual EL2 or EL3 but do
810 * include the various other features that V7VE implies.
811 * Presence of EL2 itself is ARM_FEATURE_EL2, and of the
812 * Security Extensions is ARM_FEATURE_EL3.
813 */
804 set_feature(env, ARM_FEATURE_ARM_DIV);
805 set_feature(env, ARM_FEATURE_LPAE);
814 set_feature(env, ARM_FEATURE_ARM_DIV);
815 set_feature(env, ARM_FEATURE_LPAE);
816 set_feature(env, ARM_FEATURE_V7);
806 }
807 if (arm_feature(env, ARM_FEATURE_V7)) {
808 set_feature(env, ARM_FEATURE_VAPA);
809 set_feature(env, ARM_FEATURE_THUMB2);
810 set_feature(env, ARM_FEATURE_MPIDR);
811 if (!arm_feature(env, ARM_FEATURE_M)) {
812 set_feature(env, ARM_FEATURE_V6K);
813 } else {

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1519 REGINFO_SENTINEL
1520};
1521
1522static void cortex_a7_initfn(Object *obj)
1523{
1524 ARMCPU *cpu = ARM_CPU(obj);
1525
1526 cpu->dtb_compatible = "arm,cortex-a7";
817 }
818 if (arm_feature(env, ARM_FEATURE_V7)) {
819 set_feature(env, ARM_FEATURE_VAPA);
820 set_feature(env, ARM_FEATURE_THUMB2);
821 set_feature(env, ARM_FEATURE_MPIDR);
822 if (!arm_feature(env, ARM_FEATURE_M)) {
823 set_feature(env, ARM_FEATURE_V6K);
824 } else {

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1530 REGINFO_SENTINEL
1531};
1532
1533static void cortex_a7_initfn(Object *obj)
1534{
1535 ARMCPU *cpu = ARM_CPU(obj);
1536
1537 cpu->dtb_compatible = "arm,cortex-a7";
1527 set_feature(&cpu->env, ARM_FEATURE_V7);
1538 set_feature(&cpu->env, ARM_FEATURE_V7VE);
1528 set_feature(&cpu->env, ARM_FEATURE_VFP4);
1529 set_feature(&cpu->env, ARM_FEATURE_NEON);
1530 set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
1539 set_feature(&cpu->env, ARM_FEATURE_VFP4);
1540 set_feature(&cpu->env, ARM_FEATURE_NEON);
1541 set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
1531 set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
1532 set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
1533 set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
1534 set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
1542 set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
1543 set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
1544 set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
1535 set_feature(&cpu->env, ARM_FEATURE_LPAE);
1536 set_feature(&cpu->env, ARM_FEATURE_EL3);
1537 cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7;
1538 cpu->midr = 0x410fc075;
1539 cpu->reset_fpsid = 0x41023075;
1540 cpu->mvfr0 = 0x10110222;
1541 cpu->mvfr1 = 0x11111111;
1542 cpu->ctr = 0x84448003;
1543 cpu->reset_sctlr = 0x00c50078;

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1564 define_arm_cp_regs(cpu, cortexa15_cp_reginfo); /* Same as A15 */
1565}
1566
1567static void cortex_a15_initfn(Object *obj)
1568{
1569 ARMCPU *cpu = ARM_CPU(obj);
1570
1571 cpu->dtb_compatible = "arm,cortex-a15";
1545 set_feature(&cpu->env, ARM_FEATURE_EL3);
1546 cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7;
1547 cpu->midr = 0x410fc075;
1548 cpu->reset_fpsid = 0x41023075;
1549 cpu->mvfr0 = 0x10110222;
1550 cpu->mvfr1 = 0x11111111;
1551 cpu->ctr = 0x84448003;
1552 cpu->reset_sctlr = 0x00c50078;

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1573 define_arm_cp_regs(cpu, cortexa15_cp_reginfo); /* Same as A15 */
1574}
1575
1576static void cortex_a15_initfn(Object *obj)
1577{
1578 ARMCPU *cpu = ARM_CPU(obj);
1579
1580 cpu->dtb_compatible = "arm,cortex-a15";
1572 set_feature(&cpu->env, ARM_FEATURE_V7);
1581 set_feature(&cpu->env, ARM_FEATURE_V7VE);
1573 set_feature(&cpu->env, ARM_FEATURE_VFP4);
1574 set_feature(&cpu->env, ARM_FEATURE_NEON);
1575 set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
1582 set_feature(&cpu->env, ARM_FEATURE_VFP4);
1583 set_feature(&cpu->env, ARM_FEATURE_NEON);
1584 set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
1576 set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
1577 set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
1578 set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
1579 set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
1585 set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
1586 set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
1587 set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
1580 set_feature(&cpu->env, ARM_FEATURE_LPAE);
1581 set_feature(&cpu->env, ARM_FEATURE_EL3);
1582 cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15;
1583 cpu->midr = 0x412fc0f1;
1584 cpu->reset_fpsid = 0x410430f0;
1585 cpu->mvfr0 = 0x10110222;
1586 cpu->mvfr1 = 0x11111111;
1587 cpu->ctr = 0x8444c004;
1588 cpu->reset_sctlr = 0x00c50078;

--- 445 unchanged lines hidden --- 		1588 set_feature(&cpu->env, ARM_FEATURE_EL3);
1589 cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15;
1590 cpu->midr = 0x412fc0f1;
1591 cpu->reset_fpsid = 0x410430f0;
1592 cpu->mvfr0 = 0x10110222;
1593 cpu->mvfr1 = 0x11111111;
1594 cpu->ctr = 0x8444c004;
1595 cpu->reset_sctlr = 0x00c50078;

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