cpu.c (126eeee6c7b516e0a348dd4d60e59dbfa4b4b513) cpu.c (ce3125bed935a12e619a8253c19340ecaa899347)
1/*
2 * QEMU ARM CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

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2681 t = cpu->isar.id_mmfr3;
2682 t = FIELD_DP32(t, ID_MMFR3, PAN, 2); /* ATS1E1 */
2683 cpu->isar.id_mmfr3 = t;
2684
2685 t = cpu->isar.id_mmfr4;
2686 t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */
2687 t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
2688 t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* TTCNP */
1/*
2 * QEMU ARM CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

--- 2672 unchanged lines hidden (view full) ---

2681 t = cpu->isar.id_mmfr3;
2682 t = FIELD_DP32(t, ID_MMFR3, PAN, 2); /* ATS1E1 */
2683 cpu->isar.id_mmfr3 = t;
2684
2685 t = cpu->isar.id_mmfr4;
2686 t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */
2687 t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
2688 t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* TTCNP */
2689 t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* TTS2UXN */
2689 cpu->isar.id_mmfr4 = t;
2690 }
2691#endif
2692 }
2693}
2694#endif
2695
2696#endif /* !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) */

--- 218 unchanged lines hidden --- 		2690 cpu->isar.id_mmfr4 = t;
2691 }
2692#endif
2693 }
2694}
2695#endif
2696
2697#endif /* !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) */

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