helper.c (4a24793290e3ae08025a9a310ad74c773816d069) helper.c (21ba856499f9c0ccdc05ed04432df059ae76b337)
1/*
2 * Alpha emulation cpu helpers for qemu.
3 *
4 * Copyright (c) 2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

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24#include "fpu/softfloat.h"
25#include "exec/helper-proto.h"
26#include "qemu/qemu-print.h"
27
28
29#define CONVERT_BIT(X, SRC, DST) \
30 (SRC > DST ? (X) / (SRC / DST) & (DST) : ((X) & SRC) * (DST / SRC))
31
1/*
2 * Alpha emulation cpu helpers for qemu.
3 *
4 * Copyright (c) 2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

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24#include "fpu/softfloat.h"
25#include "exec/helper-proto.h"
26#include "qemu/qemu-print.h"
27
28
29#define CONVERT_BIT(X, SRC, DST) \
30 (SRC > DST ? (X) / (SRC / DST) & (DST) : ((X) & SRC) * (DST / SRC))
31
32uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env)
32uint64_t cpu_alpha_load_fpcr(CPUAlphaState *env)
33{
34 return (uint64_t)env->fpcr << 32;
35}
36
33{
34 return (uint64_t)env->fpcr << 32;
35}
36
37void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val)
37void cpu_alpha_store_fpcr(CPUAlphaState *env, uint64_t val)
38{
39 uint32_t fpcr = val >> 32;
40 uint32_t t = 0;
41
42 t |= CONVERT_BIT(fpcr, FPCR_INED, FPCR_INE);
43 t |= CONVERT_BIT(fpcr, FPCR_UNFD, FPCR_UNF);
44 t |= CONVERT_BIT(fpcr, FPCR_OVFD, FPCR_OVF);
45 t |= CONVERT_BIT(fpcr, FPCR_DZED, FPCR_DZE);

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62 case FPCR_DYN_PLUS:
63 t = float_round_up;
64 break;
65 }
66 env->fpcr_dyn_round = t;
67
68 env->fpcr_flush_to_zero = (fpcr & FPCR_UNFD) && (fpcr & FPCR_UNDZ);
69 env->fp_status.flush_inputs_to_zero = (fpcr & FPCR_DNZ) != 0;
38{
39 uint32_t fpcr = val >> 32;
40 uint32_t t = 0;
41
42 t |= CONVERT_BIT(fpcr, FPCR_INED, FPCR_INE);
43 t |= CONVERT_BIT(fpcr, FPCR_UNFD, FPCR_UNF);
44 t |= CONVERT_BIT(fpcr, FPCR_OVFD, FPCR_OVF);
45 t |= CONVERT_BIT(fpcr, FPCR_DZED, FPCR_DZE);

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62 case FPCR_DYN_PLUS:
63 t = float_round_up;
64 break;
65 }
66 env->fpcr_dyn_round = t;
67
68 env->fpcr_flush_to_zero = (fpcr & FPCR_UNFD) && (fpcr & FPCR_UNDZ);
69 env->fp_status.flush_inputs_to_zero = (fpcr & FPCR_DNZ) != 0;
70
71#ifdef CONFIG_USER_ONLY
72 /*
73 * Override some of these bits with the contents of ENV->SWCR.
74 * In system mode, some of these would trap to the kernel, at
75 * which point the kernel's handler would emulate and apply
76 * the software exception mask.
77 */
78 if (env->swcr & SWCR_MAP_DMZ) {
79 env->fp_status.flush_inputs_to_zero = 1;
80 }
81 if (env->swcr & SWCR_MAP_UMZ) {
82 env->fp_status.flush_to_zero = 1;
83 }
84 env->fpcr_exc_enable &= ~(alpha_ieee_swcr_to_fpcr(env->swcr) >> 32);
85#endif
70}
71
72uint64_t helper_load_fpcr(CPUAlphaState *env)
73{
74 return cpu_alpha_load_fpcr(env);
75}
76
77void helper_store_fpcr(CPUAlphaState *env, uint64_t val)

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87
88uint64_t helper_load_fpcr(CPUAlphaState *env)
89{
90 return cpu_alpha_load_fpcr(env);
91}
92
93void helper_store_fpcr(CPUAlphaState *env, uint64_t val)

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