pcie.h (2c107d7684f9e3c4db4780d0756bbf35b06aec07) pcie.h (615c4ed20598ab3eda5e071ba7ba2a5bf70be59f)
1/*
2 * pcie.h
3 *
4 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by

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69 Following 6.7.3.4:
70 Software Notification of Hot-Plug Events, an interrupt
71 is sent whenever the logical and of these conditions
72 transitions from false to true. */
73
74 /* AER */
75 uint16_t aer_cap;
76 PCIEAERLog aer_log;
1/*
2 * pcie.h
3 *
4 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by

--- 60 unchanged lines hidden (view full) ---

69 Following 6.7.3.4:
70 Software Notification of Hot-Plug Events, an interrupt
71 is sent whenever the logical and of these conditions
72 transitions from false to true. */
73
74 /* AER */
75 uint16_t aer_cap;
76 PCIEAERLog aer_log;
77
78 /* Offset of ATS capability in config space */
79 uint16_t ats_cap;
77};
78
79#define COMPAT_PROP_PCP "power_controller_present"
80
81/* PCI express capability helper functions */
82int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port);
83int pcie_cap_v1_init(PCIDevice *dev, uint8_t offset,
84 uint8_t type, uint8_t port);

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115/* PCI express extended capability helper functions */
116uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id);
117void pcie_add_capability(PCIDevice *dev,
118 uint16_t cap_id, uint8_t cap_ver,
119 uint16_t offset, uint16_t size);
120
121void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn);
122void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_num);
80};
81
82#define COMPAT_PROP_PCP "power_controller_present"
83
84/* PCI express capability helper functions */
85int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port);
86int pcie_cap_v1_init(PCIDevice *dev, uint8_t offset,
87 uint8_t type, uint8_t port);

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118/* PCI express extended capability helper functions */
119uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id);
120void pcie_add_capability(PCIDevice *dev,
121 uint16_t cap_id, uint8_t cap_ver,
122 uint16_t offset, uint16_t size);
123
124void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn);
125void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_num);
126void pcie_ats_init(PCIDevice *dev, uint16_t offset);
123
124extern const VMStateDescription vmstate_pcie_device;
125
126#define VMSTATE_PCIE_DEVICE(_field, _state) { \
127 .name = (stringify(_field)), \
128 .size = sizeof(PCIDevice), \
129 .vmsd = &vmstate_pcie_device, \
130 .flags = VMS_STRUCT, \
131 .offset = vmstate_offset_value(_state, _field, PCIDevice), \
132}
133
134void pcie_cap_slot_hotplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
135 Error **errp);
136void pcie_cap_slot_hot_unplug_request_cb(HotplugHandler *hotplug_dev,
137 DeviceState *dev, Error **errp);
138#endif /* QEMU_PCIE_H */
127
128extern const VMStateDescription vmstate_pcie_device;
129
130#define VMSTATE_PCIE_DEVICE(_field, _state) { \
131 .name = (stringify(_field)), \
132 .size = sizeof(PCIDevice), \
133 .vmsd = &vmstate_pcie_device, \
134 .flags = VMS_STRUCT, \
135 .offset = vmstate_offset_value(_state, _field, PCIDevice), \
136}
137
138void pcie_cap_slot_hotplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
139 Error **errp);
140void pcie_cap_slot_hot_unplug_request_cb(HotplugHandler *hotplug_dev,
141 DeviceState *dev, Error **errp);
142#endif /* QEMU_PCIE_H */