cpu_ldst.h (68d8ef4ec540682c3538d4963e836e43a211dd17) cpu_ldst.h (d03f140804b345a85973976506492027f703d82d)
1/*
2 * Software MMU support
3 *
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or (at your option) any later version.
8 *

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147
148#define DATA_SIZE 8
149#include "exec/cpu_ldst_useronly_template.h"
150#undef MEMSUFFIX
151#undef CODE_ACCESS
152
153#else
154
1/*
2 * Software MMU support
3 *
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or (at your option) any later version.
8 *

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147
148#define DATA_SIZE 8
149#include "exec/cpu_ldst_useronly_template.h"
150#undef MEMSUFFIX
151#undef CODE_ACCESS
152
153#else
154
155/* The memory helpers for tcg-generated code need tcg_target_long etc. */
155/* Needed for TCG_OVERSIZED_GUEST */
156#include "tcg.h"
157
158static inline target_ulong tlb_addr_write(const CPUTLBEntry *entry)
159{
160#if TCG_OVERSIZED_GUEST
161 return entry->addr_write;
162#else
163 return atomic_read(&entry->addr_write);

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180
181/* Find the TLB entry corresponding to the mmu_idx + address pair. */
182static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx,
183 target_ulong addr)
184{
185 return &env_tlb(env)->f[mmu_idx].table[tlb_index(env, mmu_idx, addr)];
186}
187
156#include "tcg.h"
157
158static inline target_ulong tlb_addr_write(const CPUTLBEntry *entry)
159{
160#if TCG_OVERSIZED_GUEST
161 return entry->addr_write;
162#else
163 return atomic_read(&entry->addr_write);

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180
181/* Find the TLB entry corresponding to the mmu_idx + address pair. */
182static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx,
183 target_ulong addr)
184{
185 return &env_tlb(env)->f[mmu_idx].table[tlb_index(env, mmu_idx, addr)];
186}
187
188uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr,
189 int mmu_idx, uintptr_t ra);
190uint32_t cpu_lduw_mmuidx_ra(CPUArchState *env, abi_ptr addr,
191 int mmu_idx, uintptr_t ra);
192uint32_t cpu_ldl_mmuidx_ra(CPUArchState *env, abi_ptr addr,
193 int mmu_idx, uintptr_t ra);
194uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr,
195 int mmu_idx, uintptr_t ra);
196
197int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr,
198 int mmu_idx, uintptr_t ra);
199int cpu_ldsw_mmuidx_ra(CPUArchState *env, abi_ptr addr,
200 int mmu_idx, uintptr_t ra);
201
202void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
203 int mmu_idx, uintptr_t retaddr);
204void cpu_stw_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
205 int mmu_idx, uintptr_t retaddr);
206void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
207 int mmu_idx, uintptr_t retaddr);
208void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
209 int mmu_idx, uintptr_t retaddr);
210
188#ifdef MMU_MODE0_SUFFIX
189#define CPU_MMU_INDEX 0
190#define MEMSUFFIX MMU_MODE0_SUFFIX
191#define DATA_SIZE 1
192#include "exec/cpu_ldst_template.h"
193
194#define DATA_SIZE 2
195#include "exec/cpu_ldst_template.h"

--- 292 unchanged lines hidden --- 		211#ifdef MMU_MODE0_SUFFIX
212#define CPU_MMU_INDEX 0
213#define MEMSUFFIX MMU_MODE0_SUFFIX
214#define DATA_SIZE 1
215#include "exec/cpu_ldst_template.h"
216
217#define DATA_SIZE 2
218#include "exec/cpu_ldst_template.h"

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