hcd-uhci.c (5b7f5586d182b0cafb1f8d558992a14763e2953e) hcd-uhci.c (d3647ef1fdaf4dcaecb794b525e9def1e5d81245)
1/*
2 * USB UHCI controller emulation
3 *
4 * Copyright (c) 2005 Fabrice Bellard
5 *
6 * Copyright (c) 2008 Max Krasnyansky
7 * Magor rewrite of the UHCI data structures parser and frame processor
8 * Support for fully async operation and multiple outstanding transactions

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285 }
286 }
287 }
288 return NULL;
289}
290
291static void uhci_update_irq(UHCIState *s)
292{
1/*
2 * USB UHCI controller emulation
3 *
4 * Copyright (c) 2005 Fabrice Bellard
5 *
6 * Copyright (c) 2008 Max Krasnyansky
7 * Magor rewrite of the UHCI data structures parser and frame processor
8 * Support for fully async operation and multiple outstanding transactions

--- 276 unchanged lines hidden (view full) ---

285 }
286 }
287 }
288 return NULL;
289}
290
291static void uhci_update_irq(UHCIState *s)
292{
293 int level;
293 int level = 0;
294 if (((s->status2 & 1) && (s->intr & (1 << 2))) ||
295 ((s->status2 & 2) && (s->intr & (1 << 3))) ||
296 ((s->status & UHCI_STS_USBERR) && (s->intr & (1 << 0))) ||
297 ((s->status & UHCI_STS_RD) && (s->intr & (1 << 1))) ||
298 (s->status & UHCI_STS_HSERR) ||
299 (s->status & UHCI_STS_HCPERR)) {
300 level = 1;
294 if (((s->status2 & 1) && (s->intr & (1 << 2))) ||
295 ((s->status2 & 2) && (s->intr & (1 << 3))) ||
296 ((s->status & UHCI_STS_USBERR) && (s->intr & (1 << 0))) ||
297 ((s->status & UHCI_STS_RD) && (s->intr & (1 << 1))) ||
298 (s->status & UHCI_STS_HSERR) ||
299 (s->status & UHCI_STS_HCPERR)) {
300 level = 1;
301 } else {
302 level = 0;
303 }
304 pci_set_irq(&s->dev, level);
305}
306
307static void uhci_reset(DeviceState *dev)
308{
309 PCIDevice *d = PCI_DEVICE(dev);
310 UHCIState *s = UHCI(d);

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1165 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
1166 UHCIPCIDeviceClass *u = container_of(pc, UHCIPCIDeviceClass, parent_class);
1167 UHCIState *s = UHCI(dev);
1168 uint8_t *pci_conf = s->dev.config;
1169 int i;
1170
1171 pci_conf[PCI_CLASS_PROG] = 0x00;
1172 /* TODO: reset value should be 0. */
301 }
302 pci_set_irq(&s->dev, level);
303}
304
305static void uhci_reset(DeviceState *dev)
306{
307 PCIDevice *d = PCI_DEVICE(dev);
308 UHCIState *s = UHCI(d);

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1163 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
1164 UHCIPCIDeviceClass *u = container_of(pc, UHCIPCIDeviceClass, parent_class);
1165 UHCIState *s = UHCI(dev);
1166 uint8_t *pci_conf = s->dev.config;
1167 int i;
1168
1169 pci_conf[PCI_CLASS_PROG] = 0x00;
1170 /* TODO: reset value should be 0. */
1173 pci_conf[USB_SBRN] = USB_RELEASE_1; // release number
1174
1171 pci_conf[USB_SBRN] = USB_RELEASE_1; /* release number */
1175 pci_config_set_interrupt_pin(pci_conf, u->info.irq_pin + 1);
1176
1177 if (s->masterbus) {
1178 USBPort *ports[NB_PORTS];
1179 for(i = 0; i < NB_PORTS; i++) {
1180 ports[i] = &s->ports[i].port;
1181 }
1182 usb_register_companion(s->masterbus, ports, NB_PORTS,

--- 186 unchanged lines hidden --- 		1172 pci_config_set_interrupt_pin(pci_conf, u->info.irq_pin + 1);
1173
1174 if (s->masterbus) {
1175 USBPort *ports[NB_PORTS];
1176 for(i = 0; i < NB_PORTS; i++) {
1177 ports[i] = &s->ports[i].port;
1178 }
1179 usb_register_companion(s->masterbus, ports, NB_PORTS,

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