sdhci.c (222059a0fccf4af3be776fe35a5ea2d6a68f9a0b) sdhci.c (3b830790151ff231531ef2595793e387dd154efb)
1/*
2 * SD Association Host Standard Specification v2.0 controller emulation
3 *
4 * Datasheet: PartA2_SD_Host_Controller_Simplified_Specification_Ver2.00.pdf
5 *
6 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
7 * Mitsyanko Igor <i.mitsyanko@samsung.com>
8 * Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com>

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1377/* --- qdev common --- */
1378
1379void sdhci_initfn(SDHCIState *s)
1380{
1381 qbus_init(&s->sdbus, sizeof(s->sdbus), TYPE_SDHCI_BUS, DEVICE(s), "sd-bus");
1382
1383 s->insert_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_raise_insertion_irq, s);
1384 s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s);
1/*
2 * SD Association Host Standard Specification v2.0 controller emulation
3 *
4 * Datasheet: PartA2_SD_Host_Controller_Simplified_Specification_Ver2.00.pdf
5 *
6 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
7 * Mitsyanko Igor <i.mitsyanko@samsung.com>
8 * Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com>

--- 1368 unchanged lines hidden (view full) ---

1377/* --- qdev common --- */
1378
1379void sdhci_initfn(SDHCIState *s)
1380{
1381 qbus_init(&s->sdbus, sizeof(s->sdbus), TYPE_SDHCI_BUS, DEVICE(s), "sd-bus");
1382
1383 s->insert_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_raise_insertion_irq, s);
1384 s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s);
1385
1386 s->io_ops = &sdhci_mmio_le_ops;
1385}
1386
1387void sdhci_uninitfn(SDHCIState *s)
1388{
1389 timer_free(s->insert_timer);
1390 timer_free(s->transfer_timer);
1391
1392 g_free(s->fifo_buffer);
1393 s->fifo_buffer = NULL;
1394}
1395
1396void sdhci_common_realize(SDHCIState *s, Error **errp)
1397{
1398 ERRP_GUARD();
1399
1400 switch (s->endianness) {
1401 case DEVICE_LITTLE_ENDIAN:
1387}
1388
1389void sdhci_uninitfn(SDHCIState *s)
1390{
1391 timer_free(s->insert_timer);
1392 timer_free(s->transfer_timer);
1393
1394 g_free(s->fifo_buffer);
1395 s->fifo_buffer = NULL;
1396}
1397
1398void sdhci_common_realize(SDHCIState *s, Error **errp)
1399{
1400 ERRP_GUARD();
1401
1402 switch (s->endianness) {
1403 case DEVICE_LITTLE_ENDIAN:
1402 s->io_ops = &sdhci_mmio_le_ops;
1404 /* s->io_ops is little endian by default */
1403 break;
1404 case DEVICE_BIG_ENDIAN:
1405 break;
1406 case DEVICE_BIG_ENDIAN:
1407 if (s->io_ops != &sdhci_mmio_le_ops) {
1408 error_setg(errp, "SD controller doesn't support big endianness");
1409 return;
1410 }
1405 s->io_ops = &sdhci_mmio_be_ops;
1406 break;
1407 default:
1408 error_setg(errp, "Incorrect endianness");
1409 return;
1410 }
1411
1412 sdhci_init_readonly_registers(s, errp);

--- 528 unchanged lines hidden --- 		1411 s->io_ops = &sdhci_mmio_be_ops;
1412 break;
1413 default:
1414 error_setg(errp, "Incorrect endianness");
1415 return;
1416 }
1417
1418 sdhci_init_readonly_registers(s, errp);

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