| sdhci-internal.h (62c34848efb41f0e81af0c6b4f1d5d577039eec9) | sdhci-internal.h (ce864603443567b8186dc435ebba08338ef4a6d6) |
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| 1/* 2 * SD Association Host Standard Specification v2.0 controller emulation 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 5 * Mitsyanko Igor <i.mitsyanko@samsung.com> 6 * Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com> 7 * 8 * Based on MMC controller for Samsung S5PC1xx-based board emulation --- 290 unchanged lines hidden (view full) --- 299/* Undocumented register used by guests working around erratum ERR004536 */ 300#define ESDHC_UNDOCUMENTED_REG27 0x6c 301 302#define ESDHC_CTRL_4BITBUS (0x1 << 1) 303#define ESDHC_CTRL_8BITBUS (0x2 << 1) 304 305#define ESDHC_PRNSTS_SDSTB (1 << 3) 306 | 1/* 2 * SD Association Host Standard Specification v2.0 controller emulation 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 5 * Mitsyanko Igor <i.mitsyanko@samsung.com> 6 * Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com> 7 * 8 * Based on MMC controller for Samsung S5PC1xx-based board emulation --- 290 unchanged lines hidden (view full) --- 299/* Undocumented register used by guests working around erratum ERR004536 */ 300#define ESDHC_UNDOCUMENTED_REG27 0x6c 301 302#define ESDHC_CTRL_4BITBUS (0x1 << 1) 303#define ESDHC_CTRL_8BITBUS (0x2 << 1) 304 305#define ESDHC_PRNSTS_SDSTB (1 << 3) 306 |
| 307/* 308 * Default SD/MMC host controller features information, which will be 309 * presented in CAPABILITIES register of generic SD host controller at reset. 310 * 311 * support: 312 * - 3.3v and 1.8v voltages 313 * - SDMA/ADMA1/ADMA2 314 * - high-speed 315 * max host controller R/W buffers size: 512B 316 * max clock frequency for SDclock: 52 MHz 317 * timeout clock frequency: 52 MHz 318 * 319 * does not support: 320 * - 3.0v voltage 321 * - 64-bit system bus 322 * - suspend/resume 323 */ 324#define SDHC_CAPAB_REG_DEFAULT 0x057834b4 325 326#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \ 327 DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \ 328 DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \ 329 \ 330 /* Capabilities registers provide information on supported 331 * features of this specific host controller implementation */ \ 332 DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT), \ 333 DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0) 334 335void sdhci_initfn(SDHCIState *s); 336void sdhci_uninitfn(SDHCIState *s); 337void sdhci_common_realize(SDHCIState *s, Error **errp); 338void sdhci_common_unrealize(SDHCIState *s, Error **errp); 339void sdhci_common_class_init(ObjectClass *klass, void *data); 340 |
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| 307#endif | 341#endif |