spike.c (a8a7f680d25a6dc52b1a56a597563a6d6be5f8da) spike.c (9d3f7108bc43e93ceef7faa27c87eea8295c33ed)
1/*
2 * QEMU RISC-V Spike Board
3 *
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
6 *
7 * This provides a RISC-V Board with the following devices:
8 *

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185
186static void spike_board_init(MachineState *machine)
187{
188 const MemMapEntry *memmap = spike_memmap;
189 SpikeState *s = SPIKE_MACHINE(machine);
190 MemoryRegion *system_memory = get_system_memory();
191 MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
192 target_ulong firmware_end_addr, kernel_start_addr;
1/*
2 * QEMU RISC-V Spike Board
3 *
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
6 *
7 * This provides a RISC-V Board with the following devices:
8 *

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185
186static void spike_board_init(MachineState *machine)
187{
188 const MemMapEntry *memmap = spike_memmap;
189 SpikeState *s = SPIKE_MACHINE(machine);
190 MemoryRegion *system_memory = get_system_memory();
191 MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
192 target_ulong firmware_end_addr, kernel_start_addr;
193 const char *firmware_name;
193 uint32_t fdt_load_addr;
194 uint64_t kernel_entry;
195 char *soc_name;
196 int i, base_hartid, hart_count;
197
198 /* Check socket count limit */
199 if (SPIKE_SOCKETS_MAX < riscv_socket_count(machine)) {
200 error_report("number of sockets/nodes should be less than %d",

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250 machine->ram);
251
252 /* boot rom */
253 memory_region_init_rom(mask_rom, NULL, "riscv.spike.mrom",
254 memmap[SPIKE_MROM].size, &error_fatal);
255 memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base,
256 mask_rom);
257
194 uint32_t fdt_load_addr;
195 uint64_t kernel_entry;
196 char *soc_name;
197 int i, base_hartid, hart_count;
198
199 /* Check socket count limit */
200 if (SPIKE_SOCKETS_MAX < riscv_socket_count(machine)) {
201 error_report("number of sockets/nodes should be less than %d",

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251 machine->ram);
252
253 /* boot rom */
254 memory_region_init_rom(mask_rom, NULL, "riscv.spike.mrom",
255 memmap[SPIKE_MROM].size, &error_fatal);
256 memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base,
257 mask_rom);
258
258 if (riscv_is_32bit(&s->soc[0])) {
259 firmware_end_addr = riscv_find_and_load_firmware(machine,
260 RISCV32_BIOS_BIN, memmap[SPIKE_DRAM].base,
261 htif_symbol_callback);
262 } else {
263 firmware_end_addr = riscv_find_and_load_firmware(machine,
264 RISCV64_BIOS_BIN, memmap[SPIKE_DRAM].base,
265 htif_symbol_callback);
266 }
259 firmware_name = riscv_default_firmware_name(&s->soc[0]);
260 firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name,
261 memmap[SPIKE_DRAM].base,
262 htif_symbol_callback);
267
268 /* Load kernel */
269 if (machine->kernel_filename) {
270 kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0],
271 firmware_end_addr);
272
273 kernel_entry = riscv_load_kernel(machine->kernel_filename,
274 kernel_start_addr,

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264 /* Load kernel */
265 if (machine->kernel_filename) {
266 kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0],
267 firmware_end_addr);
268
269 kernel_entry = riscv_load_kernel(machine->kernel_filename,
270 kernel_start_addr,

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